cpu-registers

问题 This question already has answers here : The advantages of using 32bit registers/instructions in x86-64 (2 answers) Intel X86 Assembly: How to tell many bits wide is an argument? (1 answer) x86 find out operand size of instruction given only the hex machine code? (2 answers) Why is default operand size 32 bits in 64 mode? (1 answer) 64 bit assembly, when to use smaller size registers (5 answers) Closed 3 months ago . I'm learning (slowly and painfully) about x86-64 instructions, and found

问题 Currently learning assembly language using Masm. This is for an assignment in my class. I must do certain calculations using 32-bit registers (EAX and EBX). I have to handle BYTE, WORD, and DWORD variables. Not really complicated. I do not really understand why am I getting so many errors when assembling the current code: INCLUDE Irvine32.inc .data ; (declare variables) bNum01 BYTE 64 bNum02 BYTE 32 bNum03 BYTE 16 bSum BYTE ? bDiff BYTE ? bResult BYTE ? wNum01 WORD 64 wNum02 WORD 32 wNum03

问题 I have two ARM Cortex-M3 chips: STMF103C8T6 and STM32F103VET6 . When set to boot from RAM, initial state of STMF103C8T6 PC register is 0x20000108 ; 0x200001e0 for STM32F103VET6 . I am unable to find and information about these addresses in the datasheets. Why are they booted this way and where I can find some information about it? Edit: To clarify. When chip set to boot from flash, PC register points to the location of the Reset Handler. This address is provided in the reset vector table at

问题 Using compiler option, is it possible to restrict a routine from using certain set of registers? For example: Restrict a routine to use only R0-R8; Purpose: If some compiler option available, then I could ensure certain routines (like Interrupt Service Routines) to use only limited register set, and thus do limited Context Save & Restore. 回答1: When this was last discussed, the consensus was that it is not possible on a function-by-function basis. There are ways to restrict register use

问题 we all know the idea of stack and heap, but I recently read about a third option to save data: registers. I have a hard time finding good articles about this type, what I found was: http://www.dotnetperls.com/method-parameter, and a lot of stuff for C, for example: http://igoro.com/archive/volatile-keyword-in-c-memory-model-explained/ The only real informations I have so far: every CPU has its own registers, which can be used to save data, which is accessed at the fastest way possible, for

问题 Larger memories have higher decoding delay; why is the register file a part of the memory then? Does it only mean that the registers are "mapped" SRAM registers that are stored inside the microprocessor? If not, what would be the benefit of using registers as they won't be any faster than accessing RAM? Furthermore, what would be the use of them at all? I mean these are just a part of the memory so I don't see the point of having them anymore. Having them would be just as costly as

问题 Larger memories have higher decoding delay; why is the register file a part of the memory then? Does it only mean that the registers are "mapped" SRAM registers that are stored inside the microprocessor? If not, what would be the benefit of using registers as they won't be any faster than accessing RAM? Furthermore, what would be the use of them at all? I mean these are just a part of the memory so I don't see the point of having them anymore. Having them would be just as costly as

问题 Larger memories have higher decoding delay; why is the register file a part of the memory then? Does it only mean that the registers are "mapped" SRAM registers that are stored inside the microprocessor? If not, what would be the benefit of using registers as they won't be any faster than accessing RAM? Furthermore, what would be the use of them at all? I mean these are just a part of the memory so I don't see the point of having them anymore. Having them would be just as costly as

问题 I am very confused with Memory Map and Memory mapped I/O. Do general purpose registers for example in ARM Architecture r0, r1, and etc are generally memory mapped? Please help. 回答1: No, those registers are inside the actual CPU (or CPU core for multi-core CPUs). You can not access them through memory. A memory-mapped register is something which you access through an address or a pointer (in languages that has pointers). I/O devices often have memory-mapped registers, where you write to or

问题 I am very confused with Memory Map and Memory mapped I/O. Do general purpose registers for example in ARM Architecture r0, r1, and etc are generally memory mapped? Please help. 回答1: No, those registers are inside the actual CPU (or CPU core for multi-core CPUs). You can not access them through memory. A memory-mapped register is something which you access through an address or a pointer (in languages that has pointers). I/O devices often have memory-mapped registers, where you write to or