gnu-make

googletest Undefined symbols for architecture x86_64 error

风流意气都作罢 提交于 2019-11-29 16:54:26
Let GTEST_DIR be the environment variable storing the path to the googletest directory. (I cloned googletest-master from googletest's github repo .) I cd 'ed into $GTEST_DIR , did a mkdir build && cd build , then executed the following command : cmake .. -DCMAKE_C_COMPILER=$GNU-6.0.0/bin/gcc-6.0.0 -DCMAKE_CXX_COMPILER=$GNU-6.0.0/bin/g++-6.0.0 where GNU-6.0.0 is the path to my gnu install. This generated a Makefile inside $GTEST_DIR/build that I tweaked as follows : I've added CC = $GNU-6.0.0/bin/gcc-6.0.0 CXX = $GNU-6.0.0/bin/g++-6.0.0 at its beginning, to be sure that the c and c++ compilers

How to compile Box2D in Linux?

こ雲淡風輕ζ 提交于 2019-11-29 15:18:36
Compiling the Box2d Tesbed is supposed to be simple: from iforce2d : Download the Box2D source code archive from here. If you want to use the terminal all the way, you could also do this (if wget is not available, use yum to install it): wget http://box2d.googlecode.com/files/Box2D_v2.1.2.zip Use the following commands to unzip and build it. [...] unzip Box2D_v2.1.2.zip cd Box2D_v2.1.2/Box2D/Build cmake .. make ( These instructions are pretty old, I did get my source with git clone https://github.com/erincatto/Box2D.git ) Running cmake .. from Box2D/Build in the freshly cloned directory causes

cmake add_custom_command failure, target gets deleted

耗尽温柔 提交于 2019-11-29 15:08:46
I am building a test executable using CMake. During the build process, I would like to run the executable, which returns whether the tests pass or not. If not, I would like the build to fail. However, when I use add_custom_command(... POST_BUILD ... ) , and use a Makefile generator, the test executable will be deleted (explain in this question: Why does GNU make delete a file ). Is there a way to have CMake treat the executable as a .PRECIOUS , or otherwise change the CMakeLists.txt such that the executable doesn't get deleted if the tests fail? For reference, my CMakeList.txt looks like the

Why does GNU make delete a file

自古美人都是妖i 提交于 2019-11-29 13:16:06
I've got a slightly hackish makefile for running tests: ### Run the tests tests := tests/test1 tests/test2 ... test: $(tests) $(tests): %: %.c gcc -o $@ $(testflags) $< $@ It works, but it makes Make do something I've never seen it do before. My test is currently broken, and causes a bus error. Make gives the following output: gcc -o tests/test1 [flags blah blah] tests/test1.c tests/test1 make: *** [tests/test1] Bus error make: *** Deleting file `tests/test1' I'm curious about the last line. I've never seen Make do that before. Why does Make delete the compiled test? Note: I edited this

Makefile - compile multiple C file at once

假如想象 提交于 2019-11-29 13:11:43
This question is different from the one at makefiles - compile all c files at once in the sense that I have one extra requirement: I want to redirect all the object files in a separate directory. Here is the setup: I have multiple sources in a directory say src/mylib . I want the objects files to end up in build/mylib . Please note also that under mylib there are subdirectories. The first attempt was as follows: sources = $(shell find src/ -name ".c") objects_dirs = $(subst src/, build/, $(dir $(sources)) # This variable is used by the build rule to create directories for objects files prior

How to add release target to Makefile?

风格不统一 提交于 2019-11-29 12:28:38
I have following Makefile, and I would like to configure it to produce debug build by default and release build by specifying corresponding target. The problem I am trying to solve right now is following, - project contains unit tests, and I want them to be included in default build, but excluded from release, so I am added release target to Makefile: FC = ifort FFLAGS = -c -free -module modules -g3 -warn all -warn nounused LDFLAGS = -save-temps -dynamiclib INTERFACES = src/Foundation.f units/UFoundation.f units/Asserts.f units/Report.f EXCLUDES = $(patsubst %, ! -path './%', $(INTERFACES))

How similar/different are gnu make, microsoft nmake and posix standard make?

时光毁灭记忆、已成空白 提交于 2019-11-29 11:31:38
问题 How similar/different are gnu make, microsoft nmake and posix standard make? Obviously there's things like "which OS?", "which compiler?" and "which linker?", but I'm referring specifically to the syntax, semantics and command-line options of the makefiles themselves. If I write makefiles based on manuals for gnu make, what are the most important portability issues that I need to be aware of? 回答1: GNU Make and POSIX Make share a common core so that GNU Make understands makefiles intended for

error: stdio.h: No such file or directory error during make

我与影子孤独终老i 提交于 2019-11-29 10:05:31
问题 I'm trying to compile the following program in Ubuntu. But I keep getting the error: "stdio.h: No such file or directory" error. #include <stdio.h> int main(void) { printf("Hello world"); } My makefile is: obj-m += hello.o all: make -I/usr/include -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules clean: make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean 回答1: Your way of building your program is the way to build kernel module and not c program application. and stdio.h does not

How to run pre- and post-recipes for every target using GNU Make?

醉酒当歌 提交于 2019-11-29 07:20:08
In make , is it possible to define a pre- and post-recipe for every target? I want to (implicitly) insert the pre-recipe just above the first line of the explicit recipe and then (implicitly) insert the post-recipe after the last line in the explicit recipe. It would be pretty easy to do it using regular expressions to insert lines but implicit ones would be so much cleaner. You can create a special helper shell that executes the desired pre- and post- actions before and after its input script and tell make to use that shell for executing the recipes (use the SHELL variable to that end).

Why GNU Make canned recipe doesn't work?

≡放荡痞女 提交于 2019-11-29 06:18:01
问题 I'm expecting to see files foo1 and foo3 created by the makefile below. However only a file foo3 is created. To me it seems that the canned recipe make-foo is simply ignored by make. The debug outcome of targets foo1 and foo2 (empty recipe) is identical. # why canned recipe doesn't work ? # http://www.gnu.org/software/make/manual/make.html#Canned-Recipes define make-foo = echo making $@ touch $@ endef .PHONY: all all: foo1 foo2 foo3 # foo1 is not created, but why ? .PHONY: foo1 foo1: $(make