assembly

问题 I'm trying to get a simple Hello world program in NASM to run. I want to print to the console without using C-Libraries, interfacing directly with WinAPI. I am using the Visual Studio provided LINK.EXE for linking. Here's my code so far: section .data message: db 'Hello world!',10 ; 'Hello world!' plus a linefeed character messageLen: db $-message ; Length of the 'Hello world!' string global _start extern GetStdHandle extern WriteConsoleW extern ExitProcess section .text _start: ; DWORD bytes

问题 Just before I was following a guide to use the MessageBoxA function in assembly, and when creating variables, they used a ", 0" after the variable contents. What is this for? The code looks like this: paramText db "this is text", 0 回答1: db is "define byte" and this code will produce these bytes (in hexadecimal formatting): 74 68 69 73 20 69 73 20 74 65 78 74 00 The "string" in quotes is split into ASCII character codes (UTF8 in NASM is possible too I believe, so then one character may produce

问题 looking at http://ref.x86asm.net/coder32.html I found two opcodes that match for the statement xor eax,eax 1) opcode 31 XOR r/m16/32 r16/32 2) opcode 33 XOR r16/32 r/m16/32 both refers to 32bit register for operand1 and operand2. So, is there any differences in this specific case of the XORing two 32bit registers ? 回答1: x86 has 2 redundant ways to encode a 2-register instance of any of the basic ALU instructions that have r/m source and r/m destination forms. This redundancy is a consequence

问题 Just before I was following a guide to use the MessageBoxA function in assembly, and when creating variables, they used a ", 0" after the variable contents. What is this for? The code looks like this: paramText db "this is text", 0 回答1: db is "define byte" and this code will produce these bytes (in hexadecimal formatting): 74 68 69 73 20 69 73 20 74 65 78 74 00 The "string" in quotes is split into ASCII character codes (UTF8 in NASM is possible too I believe, so then one character may produce

问题 After looking at a table of registers in the x86/x64 architecture, I noticed that there's a whole section of 128, 256, and 512-bit registers that I've never seen them being used in assembly, or decompiled C/C++ code: XMM(0-15) for 128, YMM(0-15) for 256, ZMM(0-31) 512. After doing a bit of digging what I've gathered is that you have to use 2 64 bit operations in order to perform math on a 128 bit number, instead of using generic add , sub , mul , div operations. If this is the case, then what

问题 After looking at a table of registers in the x86/x64 architecture, I noticed that there's a whole section of 128, 256, and 512-bit registers that I've never seen them being used in assembly, or decompiled C/C++ code: XMM(0-15) for 128, YMM(0-15) for 256, ZMM(0-31) 512. After doing a bit of digging what I've gathered is that you have to use 2 64 bit operations in order to perform math on a 128 bit number, instead of using generic add , sub , mul , div operations. If this is the case, then what

问题 After looking at a table of registers in the x86/x64 architecture, I noticed that there's a whole section of 128, 256, and 512-bit registers that I've never seen them being used in assembly, or decompiled C/C++ code: XMM(0-15) for 128, YMM(0-15) for 256, ZMM(0-31) 512. After doing a bit of digging what I've gathered is that you have to use 2 64 bit operations in order to perform math on a 128 bit number, instead of using generic add , sub , mul , div operations. If this is the case, then what

问题 After looking at a table of registers in the x86/x64 architecture, I noticed that there's a whole section of 128, 256, and 512-bit registers that I've never seen them being used in assembly, or decompiled C/C++ code: XMM(0-15) for 128, YMM(0-15) for 256, ZMM(0-31) 512. After doing a bit of digging what I've gathered is that you have to use 2 64 bit operations in order to perform math on a 128 bit number, instead of using generic add , sub , mul , div operations. If this is the case, then what

问题 After looking at a table of registers in the x86/x64 architecture, I noticed that there's a whole section of 128, 256, and 512-bit registers that I've never seen them being used in assembly, or decompiled C/C++ code: XMM(0-15) for 128, YMM(0-15) for 256, ZMM(0-31) 512. After doing a bit of digging what I've gathered is that you have to use 2 64 bit operations in order to perform math on a 128 bit number, instead of using generic add , sub , mul , div operations. If this is the case, then what

问题 Let's say I want to reverse the byte order of a very large byte array. I can do this the slow way using the main registers but I would like to speed it up using the XMM or YMM registers. Is there a way to reverse the byte order in an XMM or YMM register? 回答1: Yes, use SSSE3 _mm_shuffle_epi8 or AVX2 _mm256_shuffle_epi8 to shuffle bytes within 16-byte AVX2 "lanes". Depending on the shuffle control vector, you can swap pairs of bytes, reverse 4-byte units, or reverse 8-byte units. Or reverse all