x86-64

问题 I've found nice example how to create thunk for closure, but it's 32-bit version: #include <stdio.h> #include <stdlib.h> #include <sys/mman.h> struct env { int x; }; struct __attribute__((packed)) thunk { unsigned char push; struct env * env_addr; unsigned char call; signed long call_offset; unsigned char add_esp[3]; unsigned char ret; }; struct thunk default_thunk = {0x68, 0, 0xe8, 0, {0x83, 0xc4, 0x04}, 0xc3}; typedef void (* cfunc)(); struct thunk * make_thunk(struct env * env, void * code

问题 In the x86-64 Tour of Intel Manuals, I read Perhaps the most surprising fact is that an instruction such as MOV EAX, EBX automatically zeroes upper 32 bits of RAX register. The Intel documentation (3.4.1.1 General-Purpose Registers in 64-Bit Mode in manual Basic Architecture) quoted at the same source tells us: 64-bit operands generate a 64-bit result in the destination general-purpose register. 32-bit operands generate a 32-bit result, zero-extended to a 64-bit result in the destination

问题 I have 32 bit application using 32 bit third party library. Now I have to make my application 64 bit , so that it can take advantage of 64 bit address space ( large memory ). Since I can not load 32bit library into 64bit application process, I am thinking of creating 32bit executable wrapper over third party library and communicate from my 64 bit app using IPC ( named pipe/socket ). So my question is would their any issue in doing so ?. Also if I have to install my application on 64 bit

问题 A lot of related questions <How is x86 instruction cache synchronized? > mention x86 should properly handle i-cache synchronization in self modifying code. I wrote the following piece of code which toggles a function call on and off from different threads interleaved with its execution. I am using compare and swap operation as an additional guard so that the modification is atomic. But I am getting intermittent crashes (SIGSEGV, SIGILL) and analyzing the core dump makes me suspicious if the

问题 When profiling code at the the assembly instruction level, what does the position of the instruction pointer really mean given that modern CPUs don't execute instructions serially or in-order? For example, assume the following x64 assembly code: mov RAX, [RBX]; // Assume a cache miss here. mov RSI, [RBX + RCX]; // Another cache miss. xor R8, R8; add RDX, RAX; // Dependent on the load into RAX. add RDI, RSI; // Dependent on the load into RSI. Which instruction will the instruction pointer

问题 I have code in NASM (64 bit) in Windows to run four simultaneous threads (each assigned to a separate core) on a four-core Windows x86-64 machine. The threads are created in a loop. After thread creation, it calls WaitForMultipleObjects to coordinate the threads. The function to call is Test_Function (see code below). Each thread (core) executes Test_Function across a large array. The first core starts at data element zero, the second core starts at 1, the third core starts at 2, the fourth

问题 Following links explain x86-32 system call conventions for both UNIX (BSD flavor) & Linux: http://www.int80h.org/bsdasm/#system-calls http://www.freebsd.org/doc/en/books/developers-handbook/x86-system-calls.html But what are the x86-64 system call conventions on both UNIX & Linux? 回答1: Further reading for any of the topics here: The Definitive Guide to Linux System Calls I verified these using GNU Assembler (gas) on Linux. Kernel Interface x86-32 aka i386 Linux System Call convention: In x86

问题 This question already has answers here : What is the effect of trailing white space in a scanf() format string? (4 answers) scanf() leaves the new line char in the buffer (4 answers) Closed last year . I'v tried to run this code, and that what happend - a. scanf want "epsilon = %lf" b. for some reason, the program does not continue to print epsilon, but insted it's scan again for "order = %d" c. print epsilon at that point d. scanf again for "order = %d" e. print the first order and exit I

问题 This code... bool condSet(int cond, int a, int b) { return cond ? a : b; } ..Generates for gcc 6.3... test edx, edx setne al test edi, edi jne .L6 rep ret .L6: test esi, esi setne al ret .. For icc 17... test edi, edi cmovne edx, esi mov eax, 1 test edx, edx cmove eax, edx ret ..And for clang 3.9 test edi, edi cmove esi, edx test esi, esi setne al ret Why do we have theses differences, for a code pattern, that I'd expect to be common? They all rely on conditional instruction, setne, cmovne,

问题 this is the assembly code i am supposed to translate: f1: subl $97, %edi xorl %eax, %eax cmpb $25, %dil setbe %al ret heres the c code I wrote that I think is equivalent. int f1(int y){ int x = y-97; int i = 0; if(x<=25){ x = i; } return x; } and heres what I get from compiling the C code. _f1: ## @f1 .cfi_startproc %bb.0: pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset %rbp, -16 movq %rsp, %rbp .cfi_def_cfa_register %rbp ## kill: def %edi killed %edi def %rdi leal -97(%rdi), %ecx xorl %eax,