JESD204B核时钟学习记录
原文: https://blog.csdn.net/iamgold9/article/details/95761218?utm_medium=distribute.pc_relevant.none-task-blog-title-3&spm=1001.2101.3001.4242 1 JESD Core的时钟列举 JESD TX (RX) Core的配置选择为Include Shared Logic in example design时,其时钟如下图所示: JESD TX (RX) Core的配置选择为Include Shared Logic in core时,其时钟如下图所示: Include Shared Logic in core将JESD204 PHY、teansceiver differential refclk buffer和global clock buffers包括在JESD Core这个Core内部,而Include Shared Logic in example design是将上述三者包括在例程种。 JESD PHY Core的时钟如下图所示: 2 JESD Core的时钟框图 JESD TX(RX) Core时钟框图如下: JESD PHY Core时钟框图如下: 3 JESD Core的时钟概述 来源: oschina 链接: https://my