sparc

I've seen the about cross compilers reply at How do I cross-compile C code on Windows for a binary to also be run on Unix (Solaris/HPUX/Linux)? I would like to know how can Y compile for SPARC on a x86 machine? Where can i find a good cross compiler? I also need to compile for HP OS. gcc is fully capable of this. Sun's compiler may be capable, but I'm more familiar with gcc. First, you should get comfortable with building gcc, and also decide if you need just the C compiler or if you need C++ or other languages. Once you've built gcc for the host you are on, you can then rebuild gcc to include

So here's the situation: I need to be able to compile binaries from a Linux machine (on Ubuntu, for what it's worth) which are able to run from a SPARC server. The program I'm trying to compile is very simple: #include <stdio.h> #include <stdlib.h> int main() { printf("Testing the SPARC program..."); return EXIT_SUCCESS; } I've tried a number of different compile lines to get it to work, but unfortunately nothing appears to be working. I tried the traditional: clang -target sparc blah.c -o blahsparc But this doesn't work, with a bunch of assembler failures: /tmp/blah-519e77.s: Assembler

I'm using an application developed in Sun Solaris 8 and it depends of the architecture SPARC ( the application using some librairies of the system Solaris 8) . Is it possible to export that application from SPARC to intel x86 ? Can i export also in another OS like Ubuntu, Windows or other ? I hope that was clear and if you need more information i'll try to clarify. Thanks. I'm assuming we're talking about a native application here (a machine code binary). Short answer: No to both questions. Long answer: Is it possible to export that application from SPARC to Intel x86? Yes, but that would

For SPARC Assembly particularly, how are annulled branches different from regular branches? I always thought that annulling branch instructions is required when I need to fill the nop delay slot for branch instructions. However, I don't think I'm correct on this part, because you can fill the nop without annulling the branch. The annulled branch instruction causes the instruction in the delay slot -- the instruction after the branch -- to be ignored if the branch is not taken. Why would this be important? Because normally, the instruction after the branch is executed, even if the branch is

I've been curious in the past few months in trying my hand at doing some assembly for the SPARC processor (either V8 or V9). My question is this, I have no access to a SPARC machine, is there a way I can run SPARC binaries on my x86 machine? I've looked at QEMU but I am not too sure how to set it up. SimICS emulates a Sparc platform. Academic and personal licenses are free. Edit: I didn't do SimICS justice in my initial response, it is a very useful tool for Sparc-based development. You can instrument, profile, and explore the behavior or code in both user space and kernel space. I first

I've found in internet the implementation of __sync_val_compare_and_swap : #define LOCK_PREFIX "lock ; " struct __xchg_dummy { unsigned long a[100]; }; #define __xg(x) ((struct __xchg_dummy *)(x)) static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) { unsigned long prev; switch (size) { case 1: __asm__ __volatile__(LOCK_PREFIX "cmpxchgb %b1,%2" : "=a"(prev) : "q"(new), "m"(*__xg(ptr)), "0"(old) : "memory"); return prev; case 2: __asm__ __volatile__(LOCK_PREFIX "cmpxchgw %w1,%2" : "=a"(prev) : "q"(new), "m"(*__xg(ptr)), "0"(old) : "memory");