pci-e

Determine what (if any) PCI devices are plugged into motherboard PCI(e) slots

你离开我真会死。 提交于 2019-12-10 10:28:41
问题 I am writing a program in C# to perform a hardware audit across many Windows XP workstations. I need to determine which PCI devices are actual cards connected via a motherboard slot - NOT onboard devices that also use the PCI buses (built into the motherboard). I can successfully list all devices that use all the PCI buses using a variety of WMI classes, but none provide any indication of what is onboard vs. what is connected via a slot. I am not fussy about how the information is retrieved

pci_alloc_consistent uncached memory

半腔热情 提交于 2019-12-08 04:41:37
问题 Is it fair to say that pci_alloc_consistent allocates a contiguous non-cached, non-paged kernel memory chunk. The reason I'm asking is that I saw this comment in some kernel/driver code (not in vanilla kernel sources), and I think I understand that the memory is presented as contiguous, however not sure that it's allocated non-cached, because the idea of cache coherency is to maintain data in the cache and DMA memory consistent. Also, not sure why they call it non-paged. E.g. https://www

PCI-e memory space access with mmap

跟風遠走 提交于 2019-12-07 04:50:57
问题 I'm using PCI-e port on Freescale MPC8308 processor (which is based on PowerPC architecture) and I have some problems when trying to use it. The endpoint PCI-e device has memory space equal to 256 MB. I can easily read and write configuration space of the endpoint device by using "pciutils" package. After writing correct values in configuration registers and getting the permission to access the memory space; I tried to access memory space by using "mmap()" function in C and used the file

Determine what (if any) PCI devices are plugged into motherboard PCI(e) slots

扶醉桌前 提交于 2019-12-06 02:22:58
I am writing a program in C# to perform a hardware audit across many Windows XP workstations. I need to determine which PCI devices are actual cards connected via a motherboard slot - NOT onboard devices that also use the PCI buses (built into the motherboard). I can successfully list all devices that use all the PCI buses using a variety of WMI classes, but none provide any indication of what is onboard vs. what is connected via a slot. I am not fussy about how the information is retrieved or from where it sourced (e.g. Pinvoke, WMI, registry, etc) as long as it's reliable. Thank you! After

Generating a 64-byte read PCIe TLP from an x86 CPU

a 夏天 提交于 2019-12-05 19:08:21
When writing data to a PCIe device, it is possible to use a write-combining mapping to hint the CPU that it should generate 64-byte TLPs towards the device. Is it possible to do something similar for reads? Somehow hint the CPU to read an entire cache line or a larger buffer instead of reading one word at a time? Intel has a white-paper on copying from video RAM to main memory ; this should be similar but a lot simpler (because the data fits in 2 or 4 vector registers). It says that NT loads will pull a whole cache-line of data from WC memory into a LFB: Ordinary load instructions pull data

PCI-e memory space access with mmap

穿精又带淫゛_ 提交于 2019-12-05 08:50:34
I'm using PCI-e port on Freescale MPC8308 processor (which is based on PowerPC architecture) and I have some problems when trying to use it. The endpoint PCI-e device has memory space equal to 256 MB. I can easily read and write configuration space of the endpoint device by using "pciutils" package. After writing correct values in configuration registers and getting the permission to access the memory space; I tried to access memory space by using "mmap()" function in C and used the file descriptor located at : "/sys/devices/pci0000:00/0000:00:00.0/resource0" which was exactly 256 MB (equal to

Memory regions not displayed in 'lspci -vv' while using 'AXI bridge for PCI express Gen3.0 subsystem'

烂漫一生 提交于 2019-12-04 18:10:54
We are developing a system with a custom processor, Microblaze and some peripherals in VC709 FPGA using Xilinx Vivado. We are using two 'PCIe : BARs' in 'AXI Bridge for PCI express'. Initially the command 'lspci -vv' used to show memory regions in the Ubuntu teminal. $ lspci -vv 0a:00.0 Memory controller: Xilinx Corporation Device 7038 | 0a:00.0 Memory controller: Xilinx Corporation Device 7018 Subsystem: Xilinx Corporation Device 0007 | Subsystem: Xilinx Corporation Device 0008 Physical Slot: 3 | Physical Slot: 3 Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- Pa| Control: I/O-

Enabling write-combining IO access in userspace

独自空忆成欢 提交于 2019-12-03 13:41:53
I have a PCIe device with a userspace driver. I'm writing commands to the device through a BAR, the commands are latency sensitive and amount of data is small (~64-bytes) so I don't want to use DMA. If I remap the physical address of the BAR in the kernel using ioremap_wc and then write 64-bytes to the BAR inside the kernel , I can see that the 64-bytes are written as a single TLP over PCIe. If I allow my userspace program to mmap the region with the MAP_SHARED flag and then write 64-bytes I see multiple TPLs on the PCIe bus, rather than a single transaction. According to the kernel PAT

What is DMA mapping and DMA engine in context of linux kernel?

匆匆过客 提交于 2019-12-03 13:24:30
What is DMA mapping and DMA engine in context of linux kernel? When DMA mapping API and DMA engine API can be used in Linux Device Driver? Any real Linux Device Driver example as a reference would be great. Punit Vara What is DMA mapping and DMA engine in context of linux kernel? The kernel normally uses virtual address. Functions like kmalloc() , vmalloc() normally return virtual address. It can be stored in void* . Virtual memory system converts these addresses to physical addresses. These physical addresses are not actually useful to drivers. Drivers must use ioremap() to map the space and

Do I need to “enable” a PCIe memory region in a Linux 3.12 driver?

杀马特。学长 韩版系。学妹 提交于 2019-12-03 08:55:25
I have code, called from the probe() function of my PCIe driver (loosely based on this post ): EDIT: Based on Andreas Bombe's response, I changed the code to use pci_iomap() , but I'm still experience the system hang static my_pci_dev pci_dev; /* local structure */ static int pci_setup_region(struct pci_dev *dev) { int bar = 0; pci_dev.physical.addr = pci_resource_start(dev, bar); pci_dev.physical.size = pci_resource_len(dev, bar); pci_dev.virtual.addr = pci_iomap(dev, bar, pci_dev.physical.size); if (NULL == pci_dev.virtual.addr) { return -ENOMEM; } else { pci_dev.virtual.size = pci_dev