pci-e | 易学教程

Difference between memory bus and address bus

阅读更多关于 Difference between memory bus and address bus

问题 Can someone very briefly point out the differences between the memory bus and address bus in computer architectures ? Also when you say memory bus does it imply that you are referring to the databus ? 回答1: Beautifully explained here. In isolation, the microprocessor, the memory and the input/output ports are interesting components, but they cannot do anything useful. In combination, they can form a complete system if they can communicate with each other. This communication is accomplished

转固态硬盘ssd

阅读更多关于转固态硬盘ssd

https://www.pc841.com/article/20180512-89492_all.html 固态硬盘怎么看好坏史上最全的SSD固态硬盘知识扫盲 (全文) 百事数码 2018-05-12 09:23 电脑百事网 38366 + 关注固态硬盘（SSD）火了很久了，如今早已成为新装机的标配，老电脑也纷纷通过升级固态硬盘，提升开关机速度、系统流畅度等。今天我们就说一说固态硬盘怎么看好坏吧，可以说是史上最全面面的一次入门固态硬盘知识扫盲。固态硬盘怎么看好坏史上最全的SSD固态硬盘知识扫盲机械硬盘瓶颈明显固态硬盘弥补短板我们都知道木桶的短板效应，就电脑的速度来说，CPU缓存、显卡缓存、甚至是内存条都是以至少十倍百倍以上的速度差距远远的超过了所有的机械硬盘的，这就一定会给电脑的性能带来一些瓶颈。固态硬盘的存储速度是机械硬盘的5-10倍左右，多少能弥补一些硬盘在速度上的短板，所以如果你觉得你的旧电脑有些卡，反应慢，换一块固态硬盘绝对能给你的旧电脑带来新的生命。机械硬盘成电脑硬件上最大的短板关于固态硬盘的知识，要说的还挺多的，这里我会循序渐进，用直观、贴切的举例来帮助大家了解固态硬盘。一、固态硬盘和机械硬盘有什么区别？机械硬盘是利用磁性来记录信息数据的，原理类似于小时候听歌用的磁带，如果我们需要找到某个数据，磁盘就会转动到记录这个信息的部位

Latency in ioread

阅读更多关于 Latency in ioread

问题 Suppose you have a PCIE device presenting a single BAR and one DMA area declared with pci_alloc_consistent(..). The BAR's flags indicate non-prefetchable, non-cacheable, memory region. What are the principle causes for latency in reading the DMA area, and similarly, what are the causes of latency reading the BAR? Thank you for answering this simple question :D! 回答1: This smells a bit like homework but I suspect the concepts are not well understood by many so I'll add an answer. The best way

What is the Base Address Register (BAR) in PCIe?

阅读更多关于 What is the Base Address Register (BAR) in PCIe?

问题 After going through some basics documents what I understood is, Base Address Register is Address space which can be accessed by PCIe IP. PCIe IP can either transmit data in Base Address Register or it can write received data on to it. Am I right? Or missing anything? 回答1: I think this is a very basic question and I would suggest to read: PCI Express Base 3.1 Specification (pcisig.com) or PCI Express Technology 3.0 (MindShare Press) book A Base Address Register (BAR) is used to: - specify how

Mapping MMIO region write-back does not work

阅读更多关于 Mapping MMIO region write-back does not work

问题 I want all read & write requests to a PCIe device to be cached by CPU caches. However, it does not work as I expected. These are my assumptions on write-back MMIO regions. Writes to the PCIe device happen only on cache write-back. The size of TLP payloads is cache block size (64B). However, captured TLPs do not follow my assumptions. Writes to the PCIe device happen on every write to the MMIO region. The size of TLP payloads is 1B. I write 8-byte of 0xff to the MMIO region with the following

Memory regions not displayed in 'lspci -vv' while using 'AXI bridge for PCI express Gen3.0 subsystem'

阅读更多关于 Memory regions not displayed in 'lspci -vv' while using 'AXI bridge for PCI express Gen3.0 subsystem'

问题 We are developing a system with a custom processor, Microblaze and some peripherals in VC709 FPGA using Xilinx Vivado. We are using two 'PCIe : BARs' in 'AXI Bridge for PCI express'. Initially the command 'lspci -vv' used to show memory regions in the Ubuntu teminal. $ lspci -vv 0a:00.0 Memory controller: Xilinx Corporation Device 7038 | 0a:00.0 Memory controller: Xilinx Corporation Device 7018 Subsystem: Xilinx Corporation Device 0007 | Subsystem: Xilinx Corporation Device 0008 Physical Slot

Memory regions not displayed in 'lspci -vv' while using 'AXI bridge for PCI express Gen3.0 subsystem'

阅读更多关于 Memory regions not displayed in 'lspci -vv' while using 'AXI bridge for PCI express Gen3.0 subsystem'

What is DMA mapping and DMA engine in context of linux kernel?

阅读更多关于 What is DMA mapping and DMA engine in context of linux kernel?

问题 What is DMA mapping and DMA engine in context of linux kernel? When DMA mapping API and DMA engine API can be used in Linux Device Driver? Any real Linux Device Driver example as a reference would be great. 回答1: What is DMA mapping and DMA engine in context of linux kernel? The kernel normally uses virtual address. Functions like kmalloc() , vmalloc() normally return virtual address. It can be stored in void* . Virtual memory system converts these addresses to physical addresses. These

Do I need to “enable” a PCIe memory region in a Linux 3.12 driver?

阅读更多关于 Do I need to “enable” a PCIe memory region in a Linux 3.12 driver?

问题 I have code, called from the probe() function of my PCIe driver (loosely based on this post): EDIT: Based on Andreas Bombe's response, I changed the code to use pci_iomap() , but I'm still experience the system hang static my_pci_dev pci_dev; /* local structure */ static int pci_setup_region(struct pci_dev *dev) { int bar = 0; pci_dev.physical.addr = pci_resource_start(dev, bar); pci_dev.physical.size = pci_resource_len(dev, bar); pci_dev.virtual.addr = pci_iomap(dev, bar, pci_dev.physical

How is a PCI / PCIe BAR size determined?

阅读更多关于 How is a PCI / PCIe BAR size determined?

问题 I know that the base address register (BAR) in PCI configuration space defines the start location of a PCI address, but how does the size of this region get established? Surely this is a property of the hardware since only it knows how far into its address space it can deal. However, I cannot seem to see a BAR size field in the PCI configuration structure. 回答1: First of all, the BAR size must be a power of two (e.g., 1 KiB, 2 MiB), and each area must be aligned in memory such that the lower