page-fault

Why page faults are usually handled by the OS, not hardware?

爱⌒轻易说出口 提交于 2021-02-05 12:24:31
问题 I find that during TLB missing process, some architecture use hardware to handle it while some use the OS. But when it comes to page fault, most of them use the OS instead of hardware. I tried to find the answer but didn't find any article explains why. Could anyone help with this? Thanks. 回答1: If the hardware could handle it on its own, it wouldn't need to fault. The whole point is that the OS hasn't wired the page into the hardware page tables, e.g. because it's not actually in memory at

Why page faults are usually handled by the OS, not hardware?

家住魔仙堡 提交于 2021-02-05 12:23:18
问题 I find that during TLB missing process, some architecture use hardware to handle it while some use the OS. But when it comes to page fault, most of them use the OS instead of hardware. I tried to find the answer but didn't find any article explains why. Could anyone help with this? Thanks. 回答1: If the hardware could handle it on its own, it wouldn't need to fault. The whole point is that the OS hasn't wired the page into the hardware page tables, e.g. because it's not actually in memory at

Instruction pointer value after the page fault trap has been handled

喜欢而已 提交于 2021-02-05 06:52:09
问题 Honestly, I am really confused with this particular virtual memory related concept. Q1) When a page fault occurs, does the processor first finishes the execution of the current instruction and then moves the IP register contents (address of next instruction) to the stack? Or, it aborts current instruction being executed and moves the contents of instruction pointer register to stack? Q2) If the second case is true, then how does it resume the instruction which was aborted because when if it

Log memory accesses that cause major page faults

痴心易碎 提交于 2021-01-22 06:46:26
问题 Does anyone know how to get the memory accesses (pointers) that cause page faults? I'm interested mostly in the major page faults. A bit of background about what I'm trying to achieve. I have an application with a large memory footprint (a database) and I want to correlate paging with the accesses to the large data structures (such as tables, indexes which are allocated using mmap()). The mappings of the process are easy to retrieve from /proc//maps. Now, if I have the memory accesses that

Disabling Paging in x86 32bit

最后都变了- 提交于 2020-07-18 05:37:28
问题 I am trying to write directly to a physical memory location, so I am using an assembly function to first disable paging, write the value, and then re-enable paging, but for some reason a page fault is still triggered when trying to write the value. As I understand it, in x86-32bit, paging is set on and off by flipping bit 32 in cr0, so here is my assembly function: mov 4(%esp), %ecx //address mov 8(%esp), %edx //value mov %cr0, %eax and $0x7fffffff, %eax mov %eax, %cr0 mov %edx, (%ecx) //this

Getting External Exception C0000006 in D2006 app - how can I force delphi to load the whole executable?

 ̄綄美尐妖づ 提交于 2020-01-11 06:45:13
问题 I get this occasionally when exiting my app - my app is running the EXE over a network. I understand it's a page fault when part of the EXE is loaded on demand. I have also observed it in the OnDrawCell method of a TDrawGrid, so I'm mystified how that might have caused a page load. Also, the exception kept happening. So my questions: Can Error C0000006 result from other causes? I have made fairly major changes to the way the app manages memory, though nothing out of the ordinary, and I'm

Minimizing page faults (and TLB faults) while “walking” a large graph

你离开我真会死。 提交于 2019-12-30 13:00:08
问题 Problem (think of the mark phase of a GC) I have a graph of “objects” that I need to walk, visiting all objects. I can store in each object if it has been visited. All the objects are stored in memory and linked together using normal pointers. The objects are not all the same size. Sometimes there is not enough ram in the system to hold all the objects in memory at the same time, and I wish to avoid “page thrashing”. I also wish to avoid TLB faults Other times, there is more than enough ram.

segmentation fault vs page fault

六眼飞鱼酱① 提交于 2019-12-18 10:22:10
问题 I was wondering what differences and relations are between segmentation fault and page fault? Does segmentation fault only belong to segmented memory model? Does page fault only belong to paged memory model? If both are yes, since most computer systems such as x86 and Linux use paged memory model instead of segmented memory model, why does GCC C compiler sometimes report segmentation fault error? Thanks and regards! 回答1: These two things are very dissimilar, actually. A segmentation fault

Is it possible to “abort” when loading a register from memory rather the triggering a page fault?

大憨熊 提交于 2019-12-17 21:17:44
问题 I am thinking about 'Minimizing page faults (and TLB faults) while “walking” a large graph' 'How to know whether a pointer is in physical memory or it will trigger a Page Fault?' is a related question looking at the problem from the other side, but does not have a solution. I wish to be able to load some data from memory into a register, but have the load abort rather than getting a page fault, if the memory is currently paged out. I need the code to work in user space on both Windows and

How to Disable Copy-on-write and zero filled on demand for mmap()

不打扰是莪最后的温柔 提交于 2019-12-06 01:11:18
问题 I am implementing cp(file copy) command using mmap(). For that I mapped the source file in MAP_PRIVATE (As I just want to read)mode and destination file in MAP_SHARED mode(As I have to writeback the changed content of destination file). While doing this I have observed performance penalty due to lots of minor page faults that occurs due to 2 reason. 1) Zero fill on demand while calling mmap(MAP_PRIVATE) for source file. 2) Copy on write while calling mmap(MAP_SHARED) for destination file. Is