mips32

问题 What is the following C code in MIPS? f = A[B[i]] I'm told it can be done in 6 lines but can't quite figure out how. f is in $t0 , i is in $t3 , A[] is in $s0 , and B[] is in $s1 . All types are integer. The best I am able to think of is lw $t5, $t3($s0); # Doesn't work because lw syntax doesn't accept a register as an offset lw $t6, $t5($s1); sadd $t0, $t6, $zero Obviously this is wrong. How would i go about getting the correct offset for each line? Thanks. 回答1: There might be more efficient

问题 I'm thinking about how to negate a signed-integer in mips32. My intuition is using definition of 2's complement like: (suppose $s0 is the number to be negated) nor $t0, $s0, $s0 ; 1's complement addiu $t0, $t0, 1 ; 2's = 1's + 1 then I realized that it can be done like: sub $t0, $zero, $s0 so... what's the difference? Which is faster? IIRC sub will try to detect overflow, but would this make is slower? Finally, is there any other way to do so? 回答1: subu $t0, $zero, $s0 is the best way, and is

问题 In MIPS, a 32-bit jump instruction consists of 6-bits for the opcode and 26-bits for the target (destination) address that we want to set the program counter to. However, it is possible to set the program counter to a 28-bit target address. How is this possible if we can only fit 26-bits in the jump instruction? 回答1: Instructions on MIPS are always 4-byte aligned, so the low 2 bits of any valid target address can only be zero. Thus, the 26 bits specified in jump instructions are always

问题 I am working on a pipeline with 6 stages: F D I X0 X1 W. I am asked how many instructions need to be killed when a branch miss-predict happens. I have come up with 4. I think this because the branch resolution happens in X1 and we will need to kill all the instructions that came after the branch. In the pipeline diagram, it looks like it would require killing 4 instructions that are in the process of flowing through the pipeline. Is that correct? I am also asked how many need to be killed if

问题 My mips32 application run against Valgrind fails in mmap function. It works fine if I run separately but when I run it against valgrind it fails with EINVAL each time. void * mem = (uint32_t *)mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, <fd>, mmap_size); 回答1: When the client application runs against the Valgrind, the Valgrind intercepts the mmap call made by the client. It then invokes the kernel's mmap function by setting the MAP_FIXED flag and also specifies the memory location to

问题 My mips32 application run against Valgrind fails in mmap function. It works fine if I run separately but when I run it against valgrind it fails with EINVAL each time. void * mem = (uint32_t *)mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, <fd>, mmap_size); 回答1: When the client application runs against the Valgrind, the Valgrind intercepts the mmap call made by the client. It then invokes the kernel's mmap function by setting the MAP_FIXED flag and also specifies the memory location to

来源： https://stackoverflow.com/questions/38045665/store-certain-bits-from-one-register-into-certain-bits-of-another-register

来源： https://stackoverflow.com/questions/38045665/store-certain-bits-from-one-register-into-certain-bits-of-another-register

来源： https://stackoverflow.com/questions/38045665/store-certain-bits-from-one-register-into-certain-bits-of-another-register

问题 I am wondering if there is any difference between the MIPS syscall and trap instructions. I can't find anything involving this, so I am not sure if there is a difference. Traps seem to just be a conditional syscall, but some clarifying can be helpful. 回答1: The SYSCALL and TRAP instructions both trigger exceptions, but the resulting exception is of a different type (SystemCall versus Trap), and the operating system will likely handle them differently. 回答2: A Trap is an exception switches to