mips32

Difference between Syscall and Traps

▼魔方 西西 提交于 2020-07-18 08:08:12
问题 I am wondering if there is any difference between the MIPS syscall and trap instructions. I can't find anything involving this, so I am not sure if there is a difference. Traps seem to just be a conditional syscall, but some clarifying can be helpful. 回答1: The SYSCALL and TRAP instructions both trigger exceptions, but the resulting exception is of a different type (SystemCall versus Trap), and the operating system will likely handle them differently. 回答2: A Trap is an exception switches to

How to extract values in bits from a register and use them to replace bits in a different register? (MIPs assembly language)

拜拜、爱过 提交于 2020-05-09 17:21:47
问题 I need to extract the value in bits 22 down to 4 from register $t0, compute the half of this value (assumed unsigned integer), and use the new value to replace bits 24 down to 6 in register $t1 without changing the others bits in $t1. The value isn't given but I don't think that should be an issue. There are 32 bits per register I'm a bit new to MIPs so I'm not sure how to go about solving this problem 回答1: I've broken down the invidual steps of the algorithm. I then created a C prototype

How to extract values in bits from a register and use them to replace bits in a different register? (MIPs assembly language)

大兔子大兔子 提交于 2020-05-09 17:21:45
问题 I need to extract the value in bits 22 down to 4 from register $t0, compute the half of this value (assumed unsigned integer), and use the new value to replace bits 24 down to 6 in register $t1 without changing the others bits in $t1. The value isn't given but I don't think that should be an issue. There are 32 bits per register I'm a bit new to MIPs so I'm not sure how to go about solving this problem 回答1: I've broken down the invidual steps of the algorithm. I then created a C prototype

Data memory unit

感情迁移 提交于 2020-01-13 19:11:50
问题 I started Verilog a few weeks ago and now I'm implementing MIPS pipelining on an FPGA board and I'm on the MEM part of the pipelining stage. I'm trying to code the Data memory unit (in picture -> Data memory Unit). I don't understand the use of memread. I understand that if memwrite is 1, the contents of the current address is passed to read data. So far, this is my code: module data_memory ( input wire [31:0] addr, // Memory Address input wire [31:0] write_data, // Memory Address Contents

Data memory unit

主宰稳场 提交于 2020-01-13 19:11:08
问题 I started Verilog a few weeks ago and now I'm implementing MIPS pipelining on an FPGA board and I'm on the MEM part of the pipelining stage. I'm trying to code the Data memory unit (in picture -> Data memory Unit). I don't understand the use of memread. I understand that if memwrite is 1, the contents of the current address is passed to read data. So far, this is my code: module data_memory ( input wire [31:0] addr, // Memory Address input wire [31:0] write_data, // Memory Address Contents

Error #5: Unaligned word memory reference

烈酒焚心 提交于 2020-01-06 05:30:11
问题 I am attempting to build an array of integers to represent edges (index of source | index of destination | weight) in an implementation of Dijkstra’s Algorithm using MIPS. On running with rsim, I am getting an “unaligned word memory reference” error. I think I may be misunderstanding what memory alignment refers to. My .data is below .data .align 4 enterNode: .asciiz "Enter the number of nodes: " enterEdges: .asciiz "Enter the number of edges: " enterSource: .asciiz "Enter source: "

MIPS being byte addressable

廉价感情. 提交于 2020-01-05 05:58:12
问题 I have been watching a lecture at the following URL explaining MIPS ISA. http://www.youtube.com/watch?v=DVFwXvxyC38&list=PLD8AF625E53B0691F&index=4 According to my understanding so far: for MIPs 32-bit, the main memory has a 32-bit address input bus, each slot in memory holds 8-bit, so each address can refer to 8-bits of memory (which is why its byte addressable); since register size is 32-bit, "words" in main memory start at every 4th byte (so that each word is 4 consecutive slots in memory

Multiplication using Logical shifts in MIPS assembly

早过忘川 提交于 2020-01-02 18:03:38
问题 Can someone please give me pointers on how I can go about making a code that multiplies using shifts in MIPS assembly? I don't understand how having a number 2^n can help me multiply using an odd multiplicand I currently have this code, I'm trying to make a calculator .text li $v0, 4 la $a0, ask_1 syscall li $v0,5 syscall move $s1, $v0 li $v0, 4 la $a0, ask_2 syscall li $v0,5 syscall move $s2, $v0 #sll $s2, $s2, 3 #$s2 * $s2^3 = result srl $s2, $s2, 1 li $v0, 1 la $a0, ($s2) syscall .data ask

How to create a jump table using a jr instruction?

和自甴很熟 提交于 2019-12-30 07:50:22
问题 C++ Program # include < iostream > # include <string > using namespace std; int main () { int resistance ; // in Ohms string partNum ; // Part Number cout << " Enter resistance : " << endl ; cin >> resistance ; switch ( resistance ) { case 3 : partNum = " OD30GJE "; break ; case 10 : partNum = " OD100JE "; break ; case 22 : partNum = " OD220JE "; break ; default : partNum = "No match "; break ; } cout << " Part number : " << partNum << endl ; return 0; } Translate the C code to MIPS assembly

How to set a floating point register to 0 in MIPS (or clear its value).

时光毁灭记忆、已成空白 提交于 2019-12-25 06:38:57
问题 I'm currently implementing a square matrix multiplier containing single floating point numbers in MIPS assembly line code. My problem is that once I am done summing the multiplications of the corresponding rows and columns in order to calculate my dot product I want to clear that floating point register so I can calculate the dot product for the next entry in the product matrix.Right now I keep adding the current dot product with all the previous dot products. Things I've tried to set the