Do memory channels use separate pins for data bus in Intel i7-4600U?
问题 i7-4600U datasheet says that SA_DQ[63:0] is used for memory channel A. And SB_DQ[63:0] is used for memory channel B. So my understanding is that memory channel A and memory channel B use different processor pins for each own's data bus. Is my understanding correct? 回答1: The presence of the of SA_DQ[63:0] and SB_DQ[63:0] pretty much says it all. The are two physical channels. If you still need a secondary "prof", you can also check the math of this statement in the datasheet Theoretical