instructions

问题 If you look at documentation of operations like cmp, test, add, sub, and and, you will notice that operations that involve register EAX and its 16 and 8 bit variants as the first operand have a distinct opcode which is different from the "general case" version of these instructions. Is this separate opcode merely a way to save code space, is it at all more efficient than the general-case opcode, or is it just some relic of the past that isn't worth shaking off for compatibility reasons? 回答1:

问题 I've a question (just like me)... but...if I've a choosen algorithm written in C or C++ or whatever code you want...fixed a compiler I can determine the number of instructions but these intructions are different each other: x ADD, y MUL, z MOV, f FADD, t FMUL (F stands for FLOATING)...Is there a methodology or equation or something else that permits to write the number of instructions in number of "Equivalent instruction" to compare different algorith? Is there somebody of you that use this

问题 From this post: Two threads being timesliced on a single CPU core won't run into a reordering problem. A single core always knows about its own reordering and will properly resolve all its own memory accesses. Multiple cores however operate independently in this regard and thus won't really know about each other's reordering. Why can't the instruction reorder issue occur on a single CPU core? This article doesn't explain it. EXAMPLE : The following pictures are picked from Memory Reordering

问题 Is there a way using C or assembler or maybe even C# to get an accurate measure of how long it takes to execute a ADD instruction? 回答1: Yes, sort of, but it's non-trivial and produces results that are almost meaningless, at least on most reasonably modern processors. On relatively slow processors (e.g., up through the original Pentium in the Intel line, still true on most small embedded processors) you can just look in the processor's data sheet and it'll (normally) tell you how many clock

问题 From NSIS documentation, we have root_key subkey key_name This attribute tells the installer to check a string in the registry, and use it for the install dir if that string is valid. If this attribute is present, it will override the InstallDir attribute if the registry key is valid, otherwise it will fall back to the InstallDir default. So, if I have these lines in a .nsi file: InstallDir "D:\myFolder\myFile" InstallDirRegKey HKCU "Software\${PRODUCT_COMPANY}\${PRODUCT_NAME}" "Install_Dir"

问题 I can't figure out why After instruction “LDR R3, R0, 2” is executed, the value stored in R3 is x370C. what does 2 stands for in this instruction? It doesn't look like an immidiate value. I understand that R0 contains x370C at this point. Can someone please help? Many thanks! .ORIG X3700 LEA R0, A LDI R2, C LDR R3, R0, 2 AND R1, R1, #0 IN ST R0, D JSR F HALT F LD R1, B ADD R1, R1, #1 BRp F RET A .FILL X1234 B .FILL X370B C .FILL X370C D .BLKW 2 E .STRINGZ "ABCD" G .FILL X1234 .END 回答1: The

问题 IDM says the memory op uses SS segment if EBP is used as base register. As a result, [ebp + esi] and [esi + ebp] references SS and DS segments, respectively. See NASM's doc: 3.3 Effective Address. In the above same section, NASM mentioned how to generate shorter machine code by replacing [eax*2] with [eax+eax] . However, NASM also generates [ebp + ebp] for [ebp*2] (i.e. no base register). I suspect [ebp+ebp] references SS segment, and [ebp*2] references DS segment. I asked NASM this question.

问题 I have very long byte arrays that need to be added to a destination array of type short (or int ). Does such SSE instruction exist? Or maybe their set ? 回答1: You need to unpack each vector of 8 bit values to two vectors of 16 bit values and then add those. __m128i v = _mm_set_epi8(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0); __m128i vl = _mm_unpacklo_epi8(v, _mm_set1_epi8(0)); // vl = { 7, 6, 5, 4, 3, 2, 1, 0 } __m128i vh = _mm_unpackhi_epi8(v, _mm_set1_epi8(0)); // vh = { 15, 14,

问题 Just as an example, I want to know exactly which of the x86 processor families support the fisttp instruction. I'm pretty certain that it's supported on the Pentium 4 and beyond, but I'd like to have some official verification of that. And more importantly, I'd like to know if it is supported any further back: is it available on the Pentium III? I tried all the obvious Google search terms, but there's hardly anything at all available online about this particular instruction. And even if there

问题 For testing purposes I have written some x86 assembly code: lea ebx, [esi] I changed the line and wrote: mov ebx, esi and the program does exactly the same. Why? In esi , there is stored the address of a string. In the first line, I stored the address of the address of the string, right? And in 2 line, it should store only the address of the string. Here, Amit Singh Tomar wrote that mov eax ,var == lea eax [var] and when I read and applied that to my case, then I was a little bit confused.