instructions

What instructions does qemu trace?

我怕爱的太早我们不能终老 提交于 2020-12-30 02:21:26
问题 I wrote the following piece of code that steps through /bin/ls and counts its instructions: #include <stdio.h> #include <sys/ptrace.h> #include <sys/types.h> #include <sys/wait.h> #include <unistd.h> #include <sys/user.h> #include <sys/reg.h> #include <sys/syscall.h> int main() { pid_t child; child = fork(); //create child if(child == 0) { ptrace(PTRACE_TRACEME, 0, NULL, NULL); char* child_argv[] = {"/bin/ls", NULL}; execv("/bin/ls", child_argv); } else { int status; long long ins_count = 0;

Dynamic vs Static instruction count

梦想与她 提交于 2020-08-27 07:17:20
问题 What is the difference between dynamic and static instruction count? a. Derive an expression to calculate the user CPU time as a function of following parameters: the dynamic instruction count (N), clock cycle per instruction (CPI) and clock frequency (f) b. Explain the reason for choosing ‘dynamic’ instruction count as a parameter in Question 3a instead of ‘static’ instruction count 回答1: The dynamic instruction count is the actual number of instructions executed by the CPU for a specific

Why can an executable run on both Intel and AMD processors?

丶灬走出姿态 提交于 2020-08-18 05:15:33
问题 How is it that an executable can work on both AMD and Intel systems. Aren't AMD's and Intel's instruction sets different? How does the executable work on both? How exactly do they compile the files to work like that. And what exactly is the role of the OS in all this? 回答1: Essentially these days, compilation is done for the OS not for hardware, as most hardware have universal protocols and/or tech, as mentioned above, x86 or x64 machine code/opcodes/instruction sets, some programmers do make

Why can an executable run on both Intel and AMD processors?

余生颓废 提交于 2020-08-18 05:14:18
问题 How is it that an executable can work on both AMD and Intel systems. Aren't AMD's and Intel's instruction sets different? How does the executable work on both? How exactly do they compile the files to work like that. And what exactly is the role of the OS in all this? 回答1: Essentially these days, compilation is done for the OS not for hardware, as most hardware have universal protocols and/or tech, as mentioned above, x86 or x64 machine code/opcodes/instruction sets, some programmers do make

How could I generate and execute machine code at runtime?

时光怂恿深爱的人放手 提交于 2020-06-24 07:59:16
问题 The closest I have gotten to assembly is building my own Java Class library which loads class files and allows you to create, compile, and decompile classes. While endeavoring this project, I wondered how the Java Virtual Machine actually generated native machine code at runtime during JIT optimizations. It got me thinking: how could one generate machine code and execute it at runtime with assembly, and as a bonus, without a JIT compiler library, or "manually"? 回答1: Your question changed

How does the CPU decode variable length instructions correctly?

半世苍凉 提交于 2020-05-23 07:34:29
问题 On most architectures, instructions are all fixed-length. This makes program loading and executing straightforward. On x86/x64, instructions are variable length, so a disassembled program might look like this: File Type: EXECUTABLE IMAGE 00401000: 8B 04 24 mov eax,dword ptr [esp] 00401003: 83 C4 04 add esp,4 00401006: FF 64 24 FC jmp dword ptr [esp-4] 0040100A: 55 push ebp 0040100B: E8 F0 FF FF FF call 00401000 00401010: 50 push eax 00401011: 68 00 30 40 00 push 403000h 00401016: E8 0D 00 00

What is the significance of operations on the register EAX having their own opcodes?

為{幸葍}努か 提交于 2020-01-20 08:08:28
问题 If you look at documentation of operations like cmp, test, add, sub, and and, you will notice that operations that involve register EAX and its 16 and 8 bit variants as the first operand have a distinct opcode which is different from the "general case" version of these instructions. Is this separate opcode merely a way to save code space, is it at all more efficient than the general-case opcode, or is it just some relic of the past that isn't worth shaking off for compatibility reasons? 回答1: