gnu-make

<command line>:1:1: error: macro names must be identifiers

由 我的未来我决定 提交于 2019-12-01 17:48:31
问题 I am new to Linux and makefiles. I have a makefile which generates .a files. When I run the makefile, I get the following error. I have no idea from which part of the code, the error occurs. [oracle@dyl02703app004 erm]# make -f erm_make_ida all .... Compiling /home/wholesale/children/dev5/comps/erm/obj/ermparseyac.c cc -g -DANSI -D -DTRACE_ON -DIDA_VERSION='"ISP-RG-V5.10.7GEN2A"' -DNO_MCP -DBUILDING_ERP -I/home/wholesale/children/dev5/comps/erm/include -I/home/wholesale/children/dev5/comps

In gnu make, can the prerequisites in a static pattern rule have different suffixes

由 ⅰ亾dé卋堺 提交于 2019-12-01 16:44:58
问题 Our make file compiles .c source files with a static pattern rule like this: OBJECTS = foo.o bar.o baz.o $(OBJECTS): %.o: %.c $(CC) $< $(C_OPTIONS) -c -o $@ I need to change one of the .c files to an Objective-C .m file. Invoking the compiler is the same for both source types, so I'd like to use the same rule and just tweak it to be more flexible. I'd rather not change the OPTIONS variable because it's also used for the linking step, etc. Is there a way to make the rule above more flexible to

Is there a configuration file for gnu make?

由 蹲街弑〆低调 提交于 2019-12-01 16:35:21
I want to tell make that it shall always use -j4 option even if I didn't specify it vie command line. Normally i would do this in some configuration file (i.e. ~/.makerc ). Does such file exist for gnu make? Have a read about the $(MAKEFLAGS) variable : export MAKEFLAGS=j4 However this will likely interfere with recursive-make-based builds (not that sensible people are using recursive make anyway!), by interfering with GNU make's ability to communicate with its sub-makes. So the more sensible approach is probably a wrapper script or an alias or shell function. Well, yes and no --- normally you

How can I make a pattern rule dependency optional in a Makefile?

由 ≡放荡痞女 提交于 2019-12-01 16:16:45
问题 I would like make to reference the timestamp of a dependency if and only if the file already exists. I have a pattern rule like this: %.pdf: %.sil sile $< -o $@ This works great in normal situations, but the .sil file makes an external reference to a lua file of the same name if it exists. How do I make make aware of this so it checks the timestamps and regenerates the PDF if the lua file is newer but ignores the dependency if the file doesn't exist at all? This: %.pdf: %.sil %.lua sile $< -o

Make compiles all the files every time including the unchanged files

由 喜夏-厌秋 提交于 2019-12-01 11:58:52
I don't know why the Make recompiles all the files every time including the unchanged files, it takes a long time. I searched the Stack Overflow and found some solutions, but I still couldn't resolve my problem. How should I change this makefile so that it won't compile all the files including the unchanged files? This is my make file: CXX = g++ CXXFLAGS = -g -Wall -O2 -std=c++11 BIN = bin SRC = src OBJ = obj COMPILER = $(BIN)/compiler LEX_CPP = $(SRC)/lex.cpp UTIL_CPP = $(SRC)/util.cpp TOKEN_CPP = $(SRC)/token.cpp MAIN_CPP = $(SRC)/main.cpp TEST_CPP = $(SRC)/test.cpp PARSER_CPP = $(SRC)

Is it possible to set Environment variables in Makefile - to be used after

由 心已入冬 提交于 2019-12-01 11:13:46
I am trying to set an Environment variable in a Makefile, so it can be used in another program running in the sam shell as make , but after make has run. Update: This is not possible according to accepted answer with comments. Steps: run make test setting env: export TEST_ENV_ONE=OneString run another program, that can read TEST_ENV_ONE Tried this: Not working: test: export TEST_ENV_ONE=OneString $(shell export TEST_ENV_TWO=TwoString) Afterwards this is empty: echo $TEST_ENV_ONE echo $TEST_ENV_TWO If you want the environment variables to be exported to the shell from which you invoked make

Make compiles all the files every time including the unchanged files

由 巧了我就是萌 提交于 2019-12-01 10:32:33
问题 I don't know why the Make recompiles all the files every time including the unchanged files, it takes a long time. I searched the Stack Overflow and found some solutions, but I still couldn't resolve my problem. How should I change this makefile so that it won't compile all the files including the unchanged files? This is my make file: CXX = g++ CXXFLAGS = -g -Wall -O2 -std=c++11 BIN = bin SRC = src OBJ = obj COMPILER = $(BIN)/compiler LEX_CPP = $(SRC)/lex.cpp UTIL_CPP = $(SRC)/util.cpp TOKEN

Can I make a makefile abort outside of a rule?

由 人走茶凉 提交于 2019-12-01 09:38:51
问题 At the top of my Makefile, before any of the rules, I have the following: ifeq ($(ENVIRONMENT),LOCAL) TARGET := local_target else TARGET := hello endif If the ENVIRONMENT environment variable is not set, or is set to a value other than LOCAL , instead of setting TARGET to hello , I want the makefile to halt and exit with -1. Can I do that?? When I change TARGET := hello to exit -1 , I get the following error: Makefile:4: *** missing separator. Stop. How can I make this work?? 回答1: exit is a

Make ignoring Prerequisite that doesn't exist

由 ﹥＞﹥吖頭↗ 提交于 2019-12-01 07:48:06
make continues to build and says everything is up to date when my dependency files say an object depends on a header file that has moved. If run make -d to capture the evaluation I see: Considering target file `../build/out/src/manager.o'. Looking for an implicit rule for `../build/out/src/manager.o'. No implicit rule found for `../build/out/src/manager.o'. Pruning file `../product/build/config/product.conf'. Pruning file `../build/out/opt_cc.txt'. Considering target file `../mem/src/manager.c'. Looking for an implicit rule for `../mem/src/manager.c'. No implicit rule found for `../mem/src

Is it possible to set Environment variables in Makefile - to be used after

由 风流意气都作罢 提交于 2019-12-01 07:27:53
问题 I am trying to set an Environment variable in a Makefile, so it can be used in another program running in the sam shell as make , but after make has run. Update: This is not possible according to accepted answer with comments. Steps: run make test setting env: export TEST_ENV_ONE=OneString run another program, that can read TEST_ENV_ONE Tried this: Not working: test: export TEST_ENV_ONE=OneString $(shell export TEST_ENV_TWO=TwoString) Afterwards this is empty: echo $TEST_ENV_ONE echo $TEST
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