gnu-make | 易学教程

GNU Make recursively expanded variables examples

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Could somebody provide a real-world example of using recursively expanded variables (REV)? In the docs or various blog posts people give only useless toy examples, like foo = $(bar) bar = $(ugh) ugh = Huh? I cannot find a real use for REV besides creating custom functions with $(call) . I also found that in the past people were using REV to supply additional parameters to a compiler for specific targets but that trick is considered outdated now because GNU Make has target-specific variables. Both recursively expanded variables and simply expanded variables recurse their expansions. The major

WWW::Mechanize::Firefox - installation-troubles on OpenSuse-Linux version 12.1

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问题 good day dear fellow perl-programmers. i have serious install-troubles with WWW::Mechanize::Firefox on OpenSuse 12.1 (which is a linux system that is used here in Europe): see the issues that i noticed in the command-line: cpan shell -- CPAN exploration and modules installation (v1.960001) Enter 'h' for help. cpan[1]> install WWW::Mechanize::Firefox; Fetching with HTTP::Tiny: http://artfiles.org/cpan.org/authors/01mailrc.txt.gz Going to read '/root/.cpan/sources/authors/01mailrc.txt.gz' .....

How to make GNU Make fail if a shell command assigned to a variable failed?

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问题 I have a Make variable: PASSWORD:=$(shell vault read -field=password test/password) If vault is not installed, make will print make: vault: Command not found , but continue executing the recipe. How do I make it fail and stop execution if the expression fails? 回答1: Here is one approach: $ cat err.mk PASSWORD:=$(shell vault read -field=password test/password) ifndef PASSWORD $(error PASSWORD not set (maybe vault failed?)) endif $ make -f err.mk make: vault: Command not found err.mk:3: ***

Referring to the target name from the list of the prerequisites

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问题 In a Makefile, I would like to refer to the target name from the list of prerequisites and to build something with it. Something of the form: %.foo: $(addsuffix .bar, $(DATA_%)) @echo $< So that, supposing you have: DATA_test = 1 2 3 When you call it as: make test That will expand to: 1.bar 2.bar 3.bar Is this somehow possible? What would be a better approach to the problem? 回答1: If your version of Make has secondary expansion, this will probably work (I can't test it because today all I have

Why does make always update this target?

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问题 Using make on my Gentoo machine (which is GNU make 3.82) with the following Makefile , I wonder why the target data/spectra/o4_greenblatt_296K.dat gets updated every time I execute make data/spectra/o4_greenblatt_296K.dat , even though none of the files params/base/fwhm.dat , params/base/wavelength_grid.dat , and data/raw/o4green_gpp.dat has changed, and the file data/spectra/o4_greenblatt_296K.dat already exists: FWHM = params/base/fwhm.dat WLGRID = params/base/wavelength_grid.dat $(WLGRID):

Make: circular dependency dropped c++

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问题 I created a makefile based on the GNU Make the tutorial: https://www.gnu.org/savannah-checkouts/gnu/make/manual/html_node/index.html#SEC_Contents. The make file works fine on initial make, but if a file is changed and make is ran there is a circular dependency dropped message and it does not build the changed file. The dropped dependency is bin/main.o <-bin/main.o. This makes sense as main.o should not depend on main.o. I searched several sites, including stackoverflow and found some useful

How to handle the sub-make in GNU make errors?

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问题 I'm using sub-make in my Makefile(GNU). But whenever sub-make fails the main make continues to run successfully after that. I want my main Makefile to fail whenever my sub-make fails. How do I do that? all: pushd ${STA_DIR};make clean;make ARGS=${A1},${A2};popd Whenever the make in STA_DIR fails the main make doesn't stop. I would like to have the main make stopped. 回答1: Since you didn't provide any details whatsoever about what your rules look like, we can't answer that question. When make

Calling `command -v find` from GNU Makefile

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问题 I use a shell (bash, but I need portability) and a GNU Makefile. I have this code: check_commands: command -v find >/dev/null command -v asdf >/dev/null As supposed, the first command is passed, the second aborts the Makefile with an error. Now, I remove the >/dev/null . Why does then check_commands: command -v find produce the following error? make: command: Command not found. 回答1: Judging from a quick look at job.c in GNU make's sources, it attempts to avoid launching a shell when it can, i

How can I set an Android Makefile to copy/rename files?

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问题 According to the Android online docs there's currently no way to specify multiple/mixed file extensions for the gcc compiler in an Android makefile. The source I'm using, a public project, has multiple extensions and in order to get it to compile I need to rename the files with the other extensions .cpp before build. I set up a project subfolder I can copy these files into and rename them and then just link to them from there but I'd like to make this step a part of the build process so that

How do I get a makefile function to stop the current target?

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问题 I have a function in a makefile that I want to stop the entire make run if a file doesn't exist, or at least the target it is executed from: vaultfile = ./vault $(shell test -f $(1) || exit 1) define get_token $(shell test -f $1 && cat $1 || exit 2) endef a: token = $(call get_token,$(vaultfile),tokenname) a: echo ==== $(token) .PHONY=a The above doesn't work, silently failing when the file is missing $ rm vault $ make echo ==== ==== $ echo f > vault $ make echo ==== f ==== f I want this to