cpu-cache

In Ulrich Drepper's paper What every programmer should know about memory , the 3rd part: CPU Caches, he shows a graph that shows the relationship between "working set" size and the cpu cycle consuming per operation (in this case, sequential reading). And there are two jumps in the graph which indicate the size of L1 cache and L2 cache. I wrote my own program to reproduce the effect in c. It just simply read a int[] array sequentially from head to tail, and I've tried different size of the array(from 1KB to 1MB). I plot the data into a graph and there is no jump, the graph is a straight line.

I'm writing a library where: It will need to run on a wide range of different platforms / Java implementations (the common case is likely to be OpenJDK or Oracle Java on Intel 64 bit machines with Windows or Linux) Achieving high performance is a priority , to the extent that I care about CPU cache line efficiency in object access In some areas, quite large graphs of small objects will be traversed / processed (let's say around 1GB scale) The main workload is almost exclusively reads Reads will be scattered across the object graph, but not totally randomly (i.e. there will be significant

I came to the topic caching and mapping and cache misses and how the cache blocks get replaced in what order when all blocks are already full. There is the least recently used algorithm or the fifo algorithm or the least frequently algorithm and random replacement, ... But what algorithms are used on actual cpu caches? Or can you use all and the... operating system decides what the best algorithm is? Edit: Even when i chose an answer, any further information is welcome ;) As hivert said - it's hard to get a clear picture on the specific algorithm, but one can deduce some of the information

Consider the following code segment: #include <stdio.h> #include <stdlib.h> #include <stdint.h> #define ARRAYSIZE(arr) (sizeof(arr)/sizeof(arr[0])) inline void clflush(volatile void *p) { asm volatile ("clflush (%0)" :: "r"(p)); } inline uint64_t rdtsc() { unsigned long a, d; asm volatile ("cpuid; rdtsc" : "=a" (a), "=d" (d) : : "ebx", "ecx"); return a | ((uint64_t)d << 32); } inline int func() { return 5;} inline void test() { uint64_t start, end; char c; start = rdtsc(); func(); end = rdtsc(); printf("%ld ticks\n", end - start); } void flushFuncCache() { // Assuming function to be not

I want to write a program to get my cache size(L1, L2, L3). I know the general idea of it. Allocate a big array Access part of it of different size each time. So I wrote a little program. Here's my code: #include <cstdio> #include <time.h> #include <sys/mman.h> const int KB = 1024; const int MB = 1024 * KB; const int data_size = 32 * MB; const int repeats = 64 * MB; const int steps = 8 * MB; const int times = 8; long long clock_time() { struct timespec tp; clock_gettime(CLOCK_REALTIME, &tp); return (long long)(tp.tv_nsec + (long long)tp.tv_sec * 1000000000ll); } int main() { // allocate memory

We are trying to use the Intel CLFLUSH instruction to flush the cache content of a process in Linux at the userspace. We create a very simple C program that first access a large array and then call the CLFLUSH to flush the virtual address space of the whole array. We measure the latency it takes for CLFLUSH to flush the whole array. The size of the array in the program is an input and we vary the input from 1MB to 40MB with a step of 2MB. In our understanding, the CLFLUSH should flush the content in the cache . So we expect to see the latency of flushing the whole array first increase linearly