assembly

问题 How do I write NOT Operation for the Risc-V (Assembly Language)? If there's no NOT instruction, how do you achieve the same thing? 回答1: Like MIPS and some other architectures, RISC V does not provide dedicated instructions for many things, including two-operand unary operations, as these operations can be had using their three-operand format, usually with x0 as the third operand, but sometimes constant 1 or -1 as the third operand. For convenience, the assembler will accept what are called

问题 How do I write NOT Operation for the Risc-V (Assembly Language)? If there's no NOT instruction, how do you achieve the same thing? 回答1: Like MIPS and some other architectures, RISC V does not provide dedicated instructions for many things, including two-operand unary operations, as these operations can be had using their three-operand format, usually with x0 as the third operand, but sometimes constant 1 or -1 as the third operand. For convenience, the assembler will accept what are called

问题 Is there no ability to have a 64 bit stack for ARMv8? I understand there is no push and pop instructions on AArch64 so is stack management left to AArch32 for parameter passing and such? How can we pass the 48 bit addresses? I'm overall confused how function calls will work when operating in AArch64. 回答1: Much like in 32-bit * , SP is a valid base register for any load/store instruction, so the mechanics aren't all that different. What is different is that SP is no longer a general-purpose

问题 Is there no ability to have a 64 bit stack for ARMv8? I understand there is no push and pop instructions on AArch64 so is stack management left to AArch32 for parameter passing and such? How can we pass the 48 bit addresses? I'm overall confused how function calls will work when operating in AArch64. 回答1: Much like in 32-bit * , SP is a valid base register for any load/store instruction, so the mechanics aren't all that different. What is different is that SP is no longer a general-purpose

问题 I am interested in executing a function which is written in C language:- //filename "CLang.c" #include<stdio.h> void fun() { printf("Hello World"); } I want to call this fun() through assembly language which i have written:- (NASM 64bit) ; filename "MyASM.asm" section .data section .bss section .text global _start _start: call fun mov rax,60 ; exit mov rdi,1 syscall I have created object file by using these commands nasm -f elf64 MyAsm.asm and gcc -c CLang.c . When I merge these two file with

问题 This question already has answers here : What registers are preserved through a linux x86-64 function call (3 answers) Closed 6 months ago . can anyone explain why this code snippet goes into an infinite loop? I presume it would have something to do with the printf function. q1: .asciz "Hello World\n" .global main main: movq %rsp, %rbp movq $3, %rcx jmp bottom loop: movq $0, %rax movq $q1, %rdi call printf bottom: decq %rcx cmpq $0, %rcx jne loop end: movq $0, %rdi call exit 回答1: The only

问题 Whats the difference between using the built-in call and return instructions vs manually pushing and popping the stack and using jumps for functions? 回答1: Functionally, if you do it correctly, nothing. However it takes more instructions and/or registers to emulate call / ret using push / pop . Of course if you really wanted to take it to the extreme, you could also emulate push / pop using lea and mov :) Also, current processors have specialized hardware to handle function calls for the

问题 So as far as I can tell, the exit code returned from r0 only uses the lowest 8 bits of this register. How wouuld I return a value higher than 8 bits? Here is the ARMv7 code: @ looping.s @ calculates sum of integers from 1 to 100 .text .balign 4 .global main main: MOV r1, #0 @ r1 = 0 as sum MOV r2, #0 @ r2 = 0 as counter loop: ADD r2, r2, #1 @ counter = counter + 1 ADD r1, r1, r2 @ sum = sum + counter CMP r2, #100 @ counter - 100 BLT loop @ if counter < 100 go to start of loop MOV r0, r1 @

问题 What is the most efficient way in Intel x86 assembly to do the following operation ( a , b are 32-bit floats): From xmm1: [-, -, a, b] to xmm1: [a, a, b, b] I could not find any useful instructions. My idea is to copying a and b to other registers and then shift the xmm1 register 4 bytes and move a or b to the lowest 4 bytes. 回答1: You're looking for unpcklps xmm1, xmm1 (https://www.felixcloutier.com/x86/unpcklps) to interleave the low elements from a register with itself: low element ->

问题 I am developing backend project using node.js and going to implement sorting products functionality. I researched some articles and there were several articles saying bubble sort is not efficient. Bubble sort was used in my previous projects and I was surprised why it is bad. Could anyone explain about why it is inefficient? If you can explain by c programming or assembler commands it would be much appreciated. 回答1: Bubble Sort has O(N^2) time complexity so it's garbage for large arrays