cortex-m3 | 易学教程

Stm32f4: DMA + ADC Transfer pausing

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问题 On the Stm32f4-Discovery board I've configured the tripple ADC Interleaved mode with DMA writing the ADC data in circular mode 2. Everything works fine, but I can't pause the transfer properly to transfer the data in the buffer through USART (the transform is performed inside an external interrupt vertor function). I am trying to implement such an algorithm: Initialize DMA and ADCs Wait for an external interrupt Pause the DMA transfer Send the buffered data through USART Resume the DMA

Can't force function table to specific address with IAR ARM compiler

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问题 I have a function table type defined like so typedef struct { uint16_t majorRevision; uint16_t minorRevision; uint8_t (*CommInit)(void *); uint8_t (*CommDeInit)(void); uint16_t (*Write)(uint8_t *, uint16_t); uint16_t (*Read)(uint8_t *, uint16_t); uint8_t (*Attached)(void); uint8_t (*ExitApp)(uint8_t); uint8_t (*Jump)(uint32_t address); uint16_t (*GetCRC)(uint8_t*, uint32_t); int (*Encrypt)(uint8_t *, uint32_t); int (*Decrypt)(uint8_t *, uint32_t); uint8_t (*Reset)(void); uint32_t (

Could not build shared library using toolchain arm-uclinuxeabi

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问题 When i build the shared library with toolchain GNU toolchain for uClinux Cortex-M3/M4 The following error occurs: /arm-2010q1/arm-uclinuxeabi/bin/ld.real: error: no memory region specified for loadable section `.dynsym' Need help please ! 回答1: Check for the GNU toolchain version properties. you can get this arm-uclinuxeabi-gcc -v in the command line. if the tool chain is builded with --disable-shared, you will not be able to create shared library. so when you build an utility you need to use

ARM: arm-none-eabi-gcc can't recognize assembler

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问题 Compiling the project through Makefile gives full set of errors. D:\projects\UVS-JK(132x64)>mingw32-make arm-none-eabi-gcc -mcpu=cortex-m4 -std=c99 -mthumb -mlittle-endian -mfpu=fpv4-sp -d16 -mfloat-abi=hard -mthumb-interwork -Os -DUSE_STDPERIPH_DRIVER -DSTM32F1 0X -DMANGUSTA_DISCOVERY -DUSE_USB_OTG_FS -DHSE_VALUE=8000000 -I./inc -I./.\libra ries\CMSIS\CM3\CoreSupport -I./ -I./inc/ -Wl,-T,stm32_flash.ld src/main.c uc16 01s/uc1601s.c startup/startup_stm32f10x_cl.s -o demo.elf startup/startup

ARM Cortex-M3 存储器映射

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在4GB的地址空间中，ARM Cortex-M3已经粗线条的平均分成了8快，每块512MB，每块也都规定了用途。每个快的大小都有512MB，显然这个非常大的，芯片厂商在每个块的范围内设计各具特色的外设时，并不一定都用得完，都只是用了其中的一部分而已。Cortex-M3的存储器映射如下图所示：在这8个Block里面，由3个Block非常重要，也是我们最关心的三个块。 Block0用来设计成内部FLASH； Block1用来设计成内部RAM； Block2用来设计成片上的外设；这三个Block内部具体区域功能划分如下：存储器Block0内部区域功能划分：Block0主要用于设计片内的FLASH， STM32F103VET6的FLASH就是512K，属于大容量。以STM32F103VET6 （指南者）为例，其Block0内部区域的功能划分具体如下：存储器Block1内部区域功能划分 Block1用于设计片内SRAM。我们使用的STM32F103VET6（指南者）的SRAM是64KB。 Block1内部区域的功能划分具体如下：存储器Block2内部区域功能划分 Block2用于片上外设，根据外设的总线速度不同，Block被分成了APB和 AHB两部分，其中APB又被分为APB1和APB2。具体如下： ———————————————— 版权声明：本文为CSDN博主「红尘

ARM-C Inter-working

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问题 I am trying out a simple program for ARM-C inter-working. Here is the code: #include<stdio.h> #include<stdlib.h> int Double(int a); extern int Start(void); int main(){ int result=0; printf("in C main\n"); result=Start(); printf("result=%d\n",result); return 0; } int Double(int a) { printf("inside double func_argument_value=%d\n",a); return (a*2); } The assembly file goes as- .syntax unified .cpu cortex-m3 .thumb .align .global Start .global Double .thumb_func Start: mov r10,lr mov r0,#42 bl

NTP Request Packet

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问题 I'm trying to figure out what I need to send (client) in the NTP request package to retrieve a NTP package from the server. I'm working with the LWIP on Cortex M3, Stellaris LM3S6965 I understand that I will recieve a UDP header and then the NTP protocol with the different timestamps the remove the latency. I probable need to make an UDP header but what do I need to add as data? wireshark image: I hope you guys can help me. 回答1: The client request packet is the same as the server reply packet

Eigen on ARM Cortex M3 with armcc

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问题 I'm trying to use Eigen library with armcc compiler using Keil for Cortex M3 target and I get compilation error: Eigen/src/Core/Transpositions.h(387): error: #135: class template "Eigen::Transpose<Eigen::TranspositionsBase<Derived>>" has no member "derived" It comes from this code: class Transpose<TranspositionsBase<TranspositionsDerived> > { typedef TranspositionsDerived TranspositionType; typedef typename TranspositionType::IndicesType IndicesType; public: explicit Transpose(const

How do I reduce execution time and number of cycles for a factorial loop? And/or code-size?

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问题 Basically I'm having a hard time getting the execution time any lower than it is, as well as reducing the amount of clock cycles and memory size. Does anyone have any idea on how I can do this? The code works fine I just want to change it a bit. Wrote a working code, but don't want to mess up the code, but also don't know what changes to make. ; Calculation of a factorial value using a simple loop ; set up the exception addresses THUMB AREA RESET, CODE, READONLY EXPORT __Vectors EXPORT Reset

Why is the reset handler located at 0x0 for Cortex-A but not for Cortex-M3

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问题 What is the reason Cortex-M3 has the initial stack pointer value located at 0x0, and reset handler located at 0x4? What is the design justification for this? Why couldn't the ARM guys leave 0x0 to the reset handler like they do for Cortex-A, then initialize SP inside the reset handler? 回答1: I think this one falls under the "it's not a bug, it's a feature" banner. The ARM architecture M (microcontroller) profile has a completely different exception model to the A and the R profiles. The A