cortex-m3

ARM cortex-M3 uint_fast32_t vs uint32_t

谁都会走 提交于 2019-12-07 06:34:59
问题 I am developing a program for an STM32Fx cortex-M3 series processor. In stdint.h the following are defined: typedef unsigned int uint_fast32_t; typedef uint32_t uint_least32_t; typedef unsigned long uint32_t; As I understand it. [u]int_fast[n]_t will give you the fastest data type of at least n bits. [u]int_least[n]_t will give you the smallest data type of at least n bits. [u]int[n]_t will give you the data type of exactly n bits. Also as far as i know sizeof(unsigned int) <= sizeof(unsigned

Which Cortex-M3 interrupts can I use for general purpose work?

血红的双手。 提交于 2019-12-07 01:47:09
问题 I'd have some code that needs to be run as the result of a particular interrupt going off. I don't want to execute it in the context of the interrupt itself but I also don't want it to execute in thread mode. I would like to run it at a priority that's lower than the high level interrupt that precipitated its running but also a priority that higher than thread level (and some other interrupts as well). I think I need to use one of the other interrupt handlers. Which ones are the best to use

STM32 WWDG interrupt firing when not configured

浪子不回头ぞ 提交于 2019-12-06 19:03:02
问题 I have an application that I am porting from the Keil IDE to build with the GNU toolchain due to license issues. I have successfully be able to set up, build, flash and run the application on the device. The application on the GNU side is for some reason is getting stuck in the weak linked IRQ handler for the WWDG which is an infinite loop. The application does not enable the WWDG, and it is disabled at reset by default. I have also verified that the configuration registers are at their

How do I reduce execution time and number of cycles for a factorial loop? And/or code-size?

我只是一个虾纸丫 提交于 2019-12-06 05:54:45
Basically I'm having a hard time getting the execution time any lower than it is, as well as reducing the amount of clock cycles and memory size. Does anyone have any idea on how I can do this? The code works fine I just want to change it a bit. Wrote a working code, but don't want to mess up the code, but also don't know what changes to make. ; Calculation of a factorial value using a simple loop ; set up the exception addresses THUMB AREA RESET, CODE, READONLY EXPORT __Vectors EXPORT Reset_Handler __Vectors DCD 0x00180000 ; top of the stack DCD Reset_Handler ; reset vector - where the

ARM cortex: mutex using bit banding

与世无争的帅哥 提交于 2019-12-06 04:01:17
问题 Given that, on the ARM Cortex M3, I can: atomically read a single bit atomically set a single bit atomically clear a single bit How can I combine these for a mutex style set of operations: try lock take lock release lock It seems that try_lock or take_lock would require two operations that would not be atomic. Do I need more control to accomplish this? Disable global interrupts would do it but it seems there should be a more surgical approach. 回答1: Your rwl_TryLock() doesn't necessarily

Which Cortex-M3 interrupts can I use for general purpose work?

南笙酒味 提交于 2019-12-05 05:30:34
I'd have some code that needs to be run as the result of a particular interrupt going off. I don't want to execute it in the context of the interrupt itself but I also don't want it to execute in thread mode. I would like to run it at a priority that's lower than the high level interrupt that precipitated its running but also a priority that higher than thread level (and some other interrupts as well). I think I need to use one of the other interrupt handlers. Which ones are the best to use and what the best way to invoke them? At the moment I'm planning on just using the interrupt handlers

Determining ARM Cortex M3 RAM Size at run time

醉酒当歌 提交于 2019-12-05 00:54:26
问题 I'm developing some software for STM32F103-based ARM microcontrollers (compiling with GCC). A few of my users want to be able to use the same binary with different versions of the same chip (that have more RAM), so I need a way of finding out how much RAM I have at runtime. There's an address (0x1FFFF7E0) that contains the flash size, but it seems there isn't one that contains the RAM size! The obvious solution is just to run up the memory addresses checking which ones are read/writable, but

STM32 WWDG interrupt firing when not configured

有些话、适合烂在心里 提交于 2019-12-04 22:58:48
I have an application that I am porting from the Keil IDE to build with the GNU toolchain due to license issues. I have successfully be able to set up, build, flash and run the application on the device. The application on the GNU side is for some reason is getting stuck in the weak linked IRQ handler for the WWDG which is an infinite loop. The application does not enable the WWDG, and it is disabled at reset by default. I have also verified that the configuration registers are at their default startup values. The only difference, other than compilers, are the linker and startup files. However

ARM cortex: mutex using bit banding

爷,独闯天下 提交于 2019-12-04 07:35:22
Given that, on the ARM Cortex M3, I can: atomically read a single bit atomically set a single bit atomically clear a single bit How can I combine these for a mutex style set of operations: try lock take lock release lock It seems that try_lock or take_lock would require two operations that would not be atomic. Do I need more control to accomplish this? Disable global interrupts would do it but it seems there should be a more surgical approach. Your rwl_TryLock() doesn't necessarily return a failure if the lock is already held when it's called (your compiler should be giving at least a warning

Zeroconf Name resolution

╄→гoц情女王★ 提交于 2019-12-04 04:48:20
I am developing a control device with an embedded webserver. The webserver provides a control interface to any web browser that requests it (from Windows browsers, Mac browsers, iPhone android etc). The problem I am having is with a general way of generically knowing how to access the device. i.e. what address to type in the web browser. Fixed IPs are too techie for my users and could go wrong as my device could be plugged into many different Local networks. Using uPnp service discovery requires software to run on the client for some platforms and isn't as natural as just typing a web address.