x86-64

Why did they use numbers for register names in x86-64?

夙愿已清 提交于 2019-12-06 03:06:12
AFAIK x86-64 adds a number of general purpose registers to those derived from Intel x86 ( rax , rcx , etc), called r8 - r15 . Why did they name the new registers like this? Why not just follow existing naming convention and call them like rfx , rgx ... ? Numbering CPU registers is the norm, almost any processor does that. The 8086 processor however is ancient, they had an extremely limited transistor budget back in 1976. Implementing a 16-bit processor with only 20,000 active transistors was quite a tour-de-force. One way they cut down was by giving registers dedicated functions. At that point

How do cores decide which cache line to invalidate in MESI?

℡╲_俬逩灬. 提交于 2019-12-06 02:54:30
I have some misunderstanding about cache lines. I'm using Haswell and Ubuntu . Now let's say we have 2-threaded application in which the following happens. mov [addr], dword 0xAC763F ;starting Thread 1 and Thread 2 Now let`s say the threads perform the following actions in parallel: Thread 1 Thread 2 mov rax, [addr] mov rax, [addr] mov [addr], dword 1 mov [addr], dword 2 Now in my understanding of what's going on is this: Before starting the main thread writes to the corresponding cache line ( addr ) and marks it as Exclusive . If both of the threads Thread 1 and Thread 2 finished reading

How to build netty-transport-native-epoll-4.0.32.Final-linux-x86_64.jar?

雨燕双飞 提交于 2019-12-06 02:27:48
I am using native epoll transport in netty and was able to download netty-transport-native-epoll-4.0.32.jar from the repository. However I also need netty-transport-native-epoll-4.0.32.Final-linux-x86_64.jar but not unable to find it anywhere. Please let me know where to download this jar, or how to build it. The file can be found here : http://repo.scub-foundation.org/artifactory/libs-release/io/netty/netty-transport-native-epoll/4.0.32.Final/ The content doesn't seem to be different than from netty-all-4.0.32.Final.jar -> io\netty\channel\epoll\ 来源: https://stackoverflow.com/questions

Best assembly or compilation for minimum of three values

风流意气都作罢 提交于 2019-12-06 01:54:11
问题 I'm looking at code generated by GCC-4.8 for x86_64 and wondering if there is a better (faster) way to compute the minimum of three values. Here's an excerpt from Python's collections module that computes the minimum of m , rightindex+1 , and leftindex : ssize_t m = n; if (m > rightindex + 1) m = rightindex + 1; if (m > leftindex) m = leftindex; GCC generates serially dependent code with CMOVs: leaq 1(%rbp), %rdx cmpq %rsi, %rdx cmovg %rsi, %rdx cmpq %rbx, %rdx cmovg %rbx, %rdx Is there

C/C++ returning struct by value under the hood

删除回忆录丶 提交于 2019-12-06 01:37:15
(This question is specific to my machine's architecture and calling conventions, Windows x86_64) I don't exactly remember where I had read this, or if I had recalled it correctly, but I had heard that, when a function should return some struct or object by value, it will either stuff it in rax (if the object can fit in the register width of 64 bits) or be passed a pointer to where the resulting object would be (I'm guessing allocated in the calling function's stack frame) in rcx , where it would do all the usual initialization, and then a mov rax, rcx for the return trip. That is, something

Exploiting a string-based overflow on x86-64 with NX (DEP) and ASLR enabled

走远了吗. 提交于 2019-12-06 01:27:36
问题 Consider the following vulnerable code/program: #include <string.h> int main(int argc, char *argv[]) { char buf[16]; strcpy(buf, argv[1]); return 0; } On IA-32 (x86, 32-bit) running Linux with NX and ASLR enabled, I would exploit this using GOT-overwrite technique, which essentially includes the following steps: Overflow buffer till RIP Overwrite RIP with the address of strcpy@plt Use a clean gadget from .text , e.g. pop edi ; pop ebp ; ret , as return address for strcpy Write arguments for

missing required architecture x86_64

馋奶兔 提交于 2019-12-06 00:47:52
问题 I have an old project, that I recompiled for an uodate, and it is now showing this error message: …. missing required architecture x86_64 in file myLibrary.a …. I have tried various tricks that I could find on the net after searching on missing required architecture x86_64 in file , but with no success. Anyone knows how to properly handle the issue? I am using Xcode Version 7.0.1. Running: lipo -info myLibrary.a shows: Architectures in the fat file: myLibrary.a are: armv7 arm64 I have been

Xcode 8.1 Undefined symbols for architecture x86_64 Error

杀马特。学长 韩版系。学妹 提交于 2019-12-06 00:31:39
Undefined symbols for architecture x86_64: "_BROADCAST_MODE_IBEACON", referenced from: -[MainViewController tableView:cellForRowAtIndexPath:] in MainViewController.o "_OBJC_CLASS_$_TZBeaconSDK", referenced from: objc-class-ref in MainViewController.o ld: symbol(s) not found for architecture x86_64 clang: error: linker command failed with exit code 1 (use -v to see invocation) I take that error when I want to use simulator. There is no problem when I build it on iPhone. There is only problem when I use simulator. I have tried to change Architectures from Build settings, error text changes as

How to determine cause of CPU halt

十年热恋 提交于 2019-12-05 22:22:44
I'm working on a research project that involves developing a new DVFS algorithm for Intel machines. To do this we're utilizing some of the code from the intel_pstates driver to actually determine the pstate for each individual CPU and using the wmsr function to set that value to registers (IA32_PERF_CTL). The problem we're encountering is when we run benchmarks, the CPU will randomly halt (not kernel panic or system hang). Is there a way we can setup a trace or another method to record the value that was trying to be written to the MSRs? 来源: https://stackoverflow.com/questions/47360483/how-to

Assembly and multicore CPUs

空扰寡人 提交于 2019-12-05 19:00:37
问题 What x86-64 instructions are used to enable/disable other cores/processors and how does one start executing code on them? Is there documentation somewhere on how this is done by the operating system? 回答1: Pretty painful to get an x86 up and going... it is not so much in the cores as in the APIC system. You need to look into the docs for your chipset, tends to be pretty much hidden unfortunately. You will have to be at the kernel level, definitely. Looking at Linux sounds like a good idea. 回答2