x86-64

问题 When reading the book Computer System: A Programmer's Perspective Section 7.7.1 Relocation Entries: the brief content of this section is how a linker relocate reference in a different object file. When compile and objdump the example source code: void swap(); int buf[2] = {1, 2}; int main() { swap(); return 0; } Then gcc -Wall -c -o main.o main.c, and objdump -S -r main.o > main.asm; and will see the relocation entry for swap: 6: e8 fc ff ff ff call 7 <main+0x7> swap(); 7: R_386_PC32 swap

问题 I'm going though 'Computer Systems: A Programmer's Perspective', chapter 3 which is about machine-level representation. I'm currently on 'Arithmetic and Logic Operations', doing one of the practice problem. The problem gives C code fragment: short scale3(short x, short y, short z){ short t = ----------------; return t; } additionally i'm given an assembly code, generated from the COMPLETE code in scale3 function: scale3: leaq (%rsi, %rsi, 9), %rbx leaq (%rbx, %rdx), %rbx leaq (%rbx, %rdi,

问题 I'm going though 'Computer Systems: A Programmer's Perspective', chapter 3 which is about machine-level representation. I'm currently on 'Arithmetic and Logic Operations', doing one of the practice problem. The problem gives C code fragment: short scale3(short x, short y, short z){ short t = ----------------; return t; } additionally i'm given an assembly code, generated from the COMPLETE code in scale3 function: scale3: leaq (%rsi, %rsi, 9), %rbx leaq (%rbx, %rdx), %rbx leaq (%rbx, %rdi,

问题 I have this file: .code64 pop %rbx that compiles nicely with yasm with the following directive: yasm.exe asm.asm -o asm.bin -m amd64 --parser=gas my question is: is there any way to use nasm parser to compile 64 bit code by using intel syntax? I don't really like AT&T syntax 回答1: See the yasm manual about the BITS directive. bits 64 pop rbx yasm.exe asm.asm -o asm.bin -m amd64 来源： https://stackoverflow.com/questions/14217080/yasm-compiling-64-bit-code-with-intel-syntax

问题 I have a code that has the following structure. #pragma omp parallel for for( i = 0; i < N; i++ ) { ..... index = get_index(...); array[index] = ...; ..... } Now the value of index is unique for each thread (it never gets overlapped for different threads), but of course OpenMP can't make a guess for this and I suppose is using synchronization objects to access array . How can I ask openmp not to use synchronization objects for array and rely on me that index value is unique for different

问题 I have a code that has the following structure. #pragma omp parallel for for( i = 0; i < N; i++ ) { ..... index = get_index(...); array[index] = ...; ..... } Now the value of index is unique for each thread (it never gets overlapped for different threads), but of course OpenMP can't make a guess for this and I suppose is using synchronization objects to access array . How can I ask openmp not to use synchronization objects for array and rely on me that index value is unique for different

问题 I am reading the Intel x86_64 guide vol.1 to refresh how memory addressing works. Still, 3.7.5 Specifying an Offset The offset part of a memory address can be specified directly as a static value (called a displacement) or through an address computation made up of one or more of the following components: • Displacement — An 8-, 16-, or 32-bit value. I read in Agner Fog's assembly guide that 64-bit absolute addressing was possible when used with (r/e)ax register. So.. Is it possible, or not,

问题 I am reading the Intel x86_64 guide vol.1 to refresh how memory addressing works. Still, 3.7.5 Specifying an Offset The offset part of a memory address can be specified directly as a static value (called a displacement) or through an address computation made up of one or more of the following components: • Displacement — An 8-, 16-, or 32-bit value. I read in Agner Fog's assembly guide that 64-bit absolute addressing was possible when used with (r/e)ax register. So.. Is it possible, or not,

问题 Are x64 registers interchangable, in the sense that any instruction that works with one combination of them will work with any other? Is there performance difference or any other considerations that make them different from each other, apart from the names? 回答1: There are some restrictions, and some differences in encoding. rsp (and esp , etc) may not be used as an index register. There are many instructions which take arguments or return results in particular registers - for example, the

问题 I've been trying to understand assembly language code generated by GCC and frequently encounter this instruction at start of many functions including _start(), but coudn't find any guide explaining it's purpose 31-0000000000001040 <_start>: 32: 1040: f3 0f 1e fa endbr64 33- 1044: 31 ed xor ebp,ebp 回答1: It stands for "End Branch 64 bit" -- or more precisely, Terminate Indirect Branch in 64 bit Intel has a document about this instruction. Here is the operation: IF EndbranchEnabled(CPL) & EFER