virtual-memory

Linux mapping virtual memory range to existing virtual memory range?

霸气de小男生 提交于 2021-02-06 13:46:16
问题 In Linux, is there a way (in user space) to map a virtual address range to the physical pages that back an existing virtual address range? The mmap() function only allows one to map files or "new" physical pages. I need to be able to do something like this: int* addr1 = malloc(SIZE); int* addr2 = 0x60000; // Assume nothing is allocated here fancy_map_function(addr1, addr2, SIZE); assert(*addr1 == *addr2); // Should succeed assert(addr1 != addr2); // Should succeed 回答1: I was curious so I

Why page faults are usually handled by the OS, not hardware?

爱⌒轻易说出口 提交于 2021-02-05 12:24:31
问题 I find that during TLB missing process, some architecture use hardware to handle it while some use the OS. But when it comes to page fault, most of them use the OS instead of hardware. I tried to find the answer but didn't find any article explains why. Could anyone help with this? Thanks. 回答1: If the hardware could handle it on its own, it wouldn't need to fault. The whole point is that the OS hasn't wired the page into the hardware page tables, e.g. because it's not actually in memory at

Why page faults are usually handled by the OS, not hardware?

家住魔仙堡 提交于 2021-02-05 12:23:18
问题 I find that during TLB missing process, some architecture use hardware to handle it while some use the OS. But when it comes to page fault, most of them use the OS instead of hardware. I tried to find the answer but didn't find any article explains why. Could anyone help with this? Thanks. 回答1: If the hardware could handle it on its own, it wouldn't need to fault. The whole point is that the OS hasn't wired the page into the hardware page tables, e.g. because it's not actually in memory at

Is address of global variables the same for different runs of the program?

孤人 提交于 2021-02-05 05:28:25
问题 Consider the following code snippet int i=10; int main() { cout<<&i; } Once an exe is generated for the program, will the output be the same for different runs of the program? Assume that the OS supports virtual memory Edit:The ques is specific to global variables which are stored in data segment. Since this is the first global variable, should the address come out to be same or different? 回答1: You always get the same addresses if ASLR is disabled. You get unpredictable addresses if ASLR is

How to compute cache bit widths for tags, indices and offsets in a set-associative cache and TLB

旧城冷巷雨未停 提交于 2021-02-04 21:08:05
问题 Following is the question: We have memory system with both virtual of 64-bits and physical address of 48-bits. The L1 TLB is fully associative with 64 entries. The page size in virtual memory is 16KB. L1 cache is of 32KB and 2-way set associative, L2 cache is of 2MB and 4-way set associative. Block size of both L1 and L2 cache is 64B. L1 cache is using virtually indexed physically tagged (VIPT) scheme. We are required to compute tags, indices and offsets. This is the solution that I have

When we run an executable, do all the sections get loaded into memory at once?

此生再无相见时 提交于 2021-02-04 20:48:53
问题 So an executable contains of different sections and headers. At the ELF Header we can see some metadata about them like the size of different headers, Starting point etc. Are the different parts of an executable get loaded into memory all at once? If yes, how / when it is defined and where we can see the information about that because the ELF Header doesn't seem to have any parameter in that matter. Thanks in advance. 回答1: With ELF binaries, sections are not what decides how the binary is

Minimum associativity for a PIPT L1 cache to also be VIPT, accessing a set without translating the index to physical

断了今生、忘了曾经 提交于 2021-02-04 07:31:49
问题 This question comes in context of a section on virtual memory in an undergraduate computer architecture course. Neither the teaching assistants nor the professor were able to answer it sufficiently, and online resources are limited. Question: Suppose a processor with the following specifications: 8KB pages 32-bit virtual addresses 28-bit physical addresses a two-level page table, with a 1KB page table at the first level, and 8KB page tables at the second level 4-byte page table entries a 16

Minimum associativity for a PIPT L1 cache to also be VIPT, accessing a set without translating the index to physical

元气小坏坏 提交于 2021-02-04 07:31:28
问题 This question comes in context of a section on virtual memory in an undergraduate computer architecture course. Neither the teaching assistants nor the professor were able to answer it sufficiently, and online resources are limited. Question: Suppose a processor with the following specifications: 8KB pages 32-bit virtual addresses 28-bit physical addresses a two-level page table, with a 1KB page table at the first level, and 8KB page tables at the second level 4-byte page table entries a 16

MEMORY_BASIC_INFORMATION and VirtualQueryEx on different architectures

十年热恋 提交于 2021-01-29 06:18:13
问题 The MSDN page for MEMORY_BASIC_INFORMATION points out in the remarks section that MEMORY_BASIC_INFORMATION32 and MEMORY_BASIC_INFORMATION64 should be specified in situations where the target process is running on a different architecture than the querying program (when using VirtualQueryEx). I also found some SO posts which pointed this out in their answers to related questions. I discovered though that the version of MEMORY_BASIC_INFORMATION I was being passed by VirtualQUeryEx was the same

Limiting the heap area's Virtual address range

时光总嘲笑我的痴心妄想 提交于 2021-01-28 02:06:12
问题 I need to do some brute-force searching in process VA space for my study and hence would like limit my heap area's virtual address range. OS course told me that heap is anywhere between data and stack pages. So I want to shrink my process VA range by doing the following: Have a custom linker script that gave start and end of data somewhere very high in address range (0x7f45f88a6000) Tweak fs/binfmt_elf.c to have stack top as (0x8f45f88a6000) instead of randomly picking. Assume my program uses