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What are the delta cycle and delta notification in SystemC?

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问题 In SystemC, there is a kind of notification called delta notification, which can be called in the following two methods. event.notify(SC_ZERO_TIME); or event.notify(0, SC_NS); It defines that in a delta notification call, processes sensitive to the event will run during the evaluation phase of the next delta cycle. So, what's the so called "delta cycle"? Is it defined just like the clock cycle or a certain period of time? 回答1: The delta cycle is not clock cycle and no time having advanced.

SC_THREAD does not get triggered by its sensitivity list

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问题 I am developing a simple NAND module in SystemC. By specification, it should have a 4 ns delay so I tried to describe it with a process with a "wait" statement and SC_THREAD , as follows: //file: nand.h #include "systemc.h" SC_MODULE(nand2){ sc_in<bool> A, B; sc_out<bool> F; void do_nand2(){ bool a, b, f; a = A.read(); b = B.read(); f = !(a && b); wait(4, SC_NS); F.write(f); } SC_CTOR(nand2){ SC_THREAD(do_nand2); sensitive << A << B; } }; To simulate I've created another module the outputs

Running Boost unit tests on different processes

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问题 I want to do unit testing in a SystemC program. The idea is to have multiple test suites with several tests in each suite. Each one of the tests would require resetting the SystemC framework (e.g., by calling sc_simcontext::reset() ), but that is actually not possible due to some bug that is apparently not going to be fixed anytime soon. Therefore, I decided to come up with a workaround. I found out that if I run each test on a different process everything works fine. The following code

Installing SystemC for VS2013

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I am using Windows 10 64-bit machine with Visual Studio Professional 2013 and I want to install SystemC. I downloaded SystemC 2.3.1 and I tried following the "Installation notes" provided but they're slightly outdated. For one, it says "for VS 2005 and higher on Windows 7 machines" but I am using Windows 10, nevertheless I still tried to follow it. Second, the inclusion of src and lib files cannot be followed as stated there since this method was changed in VS2013. There seems to be no global setting anymore via Tools->Options->Projects->VCC++ directions tab. Now, I was able to successfully

Running Boost unit tests on different processes

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I want to do unit testing in a SystemC program. The idea is to have multiple test suites with several tests in each suite. Each one of the tests would require resetting the SystemC framework (e.g., by calling sc_simcontext::reset() ), but that is actually not possible due to some bug that is apparently not going to be fixed anytime soon. Therefore, I decided to come up with a workaround. I found out that if I run each test on a different process everything works fine. The following code snippet gives an overview of the scheme I used to make it work: void test1() { // ... sc_start(); } void

Using existing unit test frameworks with SystemC

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I am working on a project in SystemC and want to incorporate unit testing. Is it possible to use existing unit test frameworks with SystemC? I ask this because it seems like the SystemC modules only get executed with the simulation kernel, and I want to use unit tests on the modules themselves. tymonx You must create all necessary SystemC signals, SystemC modules and make connection between them before you run any test in GTest. This requires to create own gtest_main.cc implementation. Naturally in SystemC you must put everything in sc_main function. For this, I would use registry design

VHDL/Verilog related programming forums? [closed]

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Hardware design with VHDL or Verilog is more like programming nowadays. However, I see SO members are not so actively talking about VHDL/Verilog programming. Is there any forum dealing with hardware design with Verilog/VHDL/SystemVerilog or SystemC? Prof. Falken Logic Design was closed because of too little attention. It's now reopened, but interest remains low. comp.lang.vhdl http://groups.google.com/group/comp.lang.vhdl/ I haven't actively read it in a couple years, but I recall it being a great source, with some very knowledgeable and helpful people. Looking at it now it appears to be

VHDL/Verilog related programming forums? [closed]

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问题 Hardware design with VHDL or Verilog is more like programming nowadays. However, I see SO members are not so actively talking about VHDL/Verilog programming. Is there any forum dealing with hardware design with Verilog/VHDL/SystemVerilog or SystemC? 回答1: Logic Design was closed because of too little attention. It's now reopened, but interest remains low. 回答2: IRC: ##verilog, ##vhdl, ##fpga on irc.freenode.net Netnews: comp.arch.fpga (http://groups.google.com/group/comp.arch.fpga/topics) 回答3: