stdatomic

问题 This question already has an answer here: Can a bool read/write operation be not atomic on x86? [duplicate] 3 answers Do I have to use atomic<bool> for “exit” bool variable? 3 answers Isn\'t atomic<bool> redundant because bool is atomic by nature? I don\'t think it\'s possible to have a partially modified bool value. When do I really need to use atomic<bool> instead of bool ? 回答1: No type in C++ is "atomic by nature" unless it is an std::atomic* -something. That's because the standard says so

问题 I\'m wondering why no compilers are prepared to merge consecutive writes of the same value to a single atomic variable, e.g.: #include <atomic> std::atomic<int> y(0); void f() { auto order = std::memory_order_relaxed; y.store(1, order); y.store(1, order); y.store(1, order); } Every compiler I\'ve tried will issue the above write three times. What legitimate, race-free observer could see a difference between the above code and an optimized version with a single write (i.e. doesn\'t the \'as-if

问题 Similar to my previous question, consider this code -- Initially -- std::atomic<int> x{0}; std::atomic<int> y{0}; -- Thread 1 -- x.store(1, std::memory_order_release); -- Thread 2 -- y.store(2, std::memory_order_release); -- Thread 3 -- int r1 = x.load(std::memory_order_acquire); // x first int r2 = y.load(std::memory_order_acquire); -- Thread 4 -- int r3 = y.load(std::memory_order_acquire); // y first int r4 = x.load(std::memory_order_acquire); Is the weird outcome r1==1, r2==0 and r3==2, r4

问题 Here (and in a few SO questions) I see that C++ doesn\'t support something like lock-free std::atomic<double> and can\'t yet support something like atomic AVX/SSE vector because it\'s CPU-dependent (though nowadays of CPUs I know, ARM, AArch64 and x86_64 have vectors). But is there assembly-level support for atomic operations on double s or vectors in x86_64? If so, which operations are supported (like load, store, add, subtract, multiply maybe)? Which operations does MSVC++2017 implement