processor

How to know on which physical processor and on which physical core my code is running

自作多情 提交于 2019-11-28 01:13:15
How can I know in a C program, on which physical processor and core my code is running? I'm using Linux and gcc 4.4.3. You may check /proc//stat file system, according to http://www.kernel.org/doc/Documentation/filesystems/proc.txt , you should just check task_cpu flag. As example without correct types and error checking: struct pstat { int pid; //process id char tcomm[256];//filename of the executable char state[2]; //state (R is running, S is sleeping, D is sleeping in an //uninterruptible wait, Z is zombie, T is traced or stopped) int ppid;// process id of the parent process int pgrp;//

Difference between clock() and MPI_Wtime()

强颜欢笑 提交于 2019-11-28 01:01:09
问题 Quick Question . for MPI implementation of my code ,i am getting a huge difference in both. I know MPI_Wtime is the real time elapsed by each processor and clock() gives a rough idea of the expected time . Do anyone wants to add some assertion ? 回答1: The clock function is utterly useless. It measures cpu time, not real time/wall time, and moreover it has the following serious issues: On most implementations, the resolution is extremely bad, for example, 1/100 of a second. CLOCKS_PER_SECOND is

django request in template

99封情书 提交于 2019-11-28 00:40:39
I've enabled the django request processor TEMPLATE_PROCESSORS = ( "django.core.context_processors.auth", "django.core.context_processors.debug", "django.core.context_processors.i18n", "django.core.context_processors.media", "django.core.context_processors.request", ) Still i don't have to request variable available in templates. I've to manually pass it. Using django 1.0.2 Everywhere on web it seems it's only about enabled request processor.. Also i am using RequestContext as : return render_to_response( 'profile.html', { 'persons':Person.objects.all(), 'person':Person.objects.get(id=id),

Processor, OS : 32bit, 64 bit

倾然丶 夕夏残阳落幕 提交于 2019-11-27 10:13:45
I am new to programming and come from a non-CS background (no formal degree). I mostly program winforms using C#. I am confused about 32 bit and 64 bit.... I mean, have heard about 32 bit OS, 32 bit processor and based on which a program can have maximum memory. How it affects the speed of a program. There are lot more questions which keep coming to mind. I tried to go through some Computer Organization and Architecture books. But, either I am too dumb to understand what is written in there or the writers assume that the reader has some CS background. Can someone explain me these things in a

How do cache lines work?

一笑奈何 提交于 2019-11-27 09:56:53
I understand that the processor brings data into the cache via cache lines, which - for instance, on my Atom processor - brings in about 64 bytes at a time, whatever the size of the actual data being read. My question is: Imagine that you need to read one byte from memory, which 64 bytes will be brought into the cache? The two possibilities I can see is that, either the 64 bytes start at the closest 64 bytes boundary below the byte of interest, or the 64 bytes are spread around the byte in some predetermined way (for instance, half under, half above, or all above). Which is it? Eugene Smith If

Polling or Interrupt based method

荒凉一梦 提交于 2019-11-27 09:25:17
问题 When should one use polling method and when should one use interrupt based method ? Are there scenarios in which both can be used ? 回答1: If the event of interest is: Asynchronous Urgent Infrequent then an interrupt based handler would make sense. If the event of interest is: Synchronous (i.e. you know when to expect it within a small window) Not Urgent (i.e. a slow polling interval has no ill effects) Frequent (i.e. majority of your polling cycles create a 'hit') then polling might be a

What is the Most Efficient Java-Based streaming XSLT Processor? [closed]

自闭症网瘾萝莉.ら 提交于 2019-11-27 07:48:54
I have a very large XML file which I need to transform into another XML file, and I would like to do this with XSLT. I am more interested in optimisation for memory, rather than optimisation for speed (though, speed would be good too!). Which Java-based XSLT processor would you recommmend for this task? Would you recommend any other way of doing it (non-XSLT?, non-Java?), and if so, why? The XML files in questions are very large, but not very deep - with millions of rows (elements), but only about 3 levels deep. Dimitre Novatchev At present there are only three XSLT 2.0 processors known and

Good resources on how to program PEBS (Precise event based sampling) counters?

爷,独闯天下 提交于 2019-11-27 07:17:16
问题 I have been trying to log all memory accesses of a program, which as I read seems to be impossible. I have been trying to see to what extent can I go to log atleast a major portion of the memory accesses, if not all. So I was looking to program the PEBS counters in such a way that I could see changes in the number of memory access samples collected. I wanted to know if I can do this by modifying the counter-reset value of PEBS counters. (Usually this goes to zero, but I want to set it to a

How to get the number of CPUs in Linux using C?

僤鯓⒐⒋嵵緔 提交于 2019-11-27 06:35:59
Is there an API to get the number of CPUs available in Linux? I mean, without using /proc/cpuinfo or any other sys-node file... I've found this implementation using sched.h: int GetCPUCount() { cpu_set_t cs; CPU_ZERO(&cs); sched_getaffinity(0, sizeof(cs), &cs); int count = 0; for (int i = 0; i < 8; i++) { if (CPU_ISSET(i, &cs)) count++; } return count; } But, isn't there anything more higher level using common libraries? Владимир Николайчук #include <stdio.h> #include <sys/sysinfo.h> int main(int argc, char *argv[]) { printf("This system has %d processors configured and " "%d processors

Is it possible to know the address of a cache miss?

梦想的初衷 提交于 2019-11-27 06:09:45
问题 Whenever a cache miss occurs, is it possible to know the address of that missed cache line? Are there any hardware performance counters in modern processors that can provide such information? 回答1: Yes, on modern Intel hardware there are precise memory sampling events that track not only the address of the instruction, but the data address as well. These events also includes a great deal of other information, such as what level of the cache hierarchy the memory access was satisfied it, the