memory-model

问题 I'm aware that a synchronizes-with relationship will occur between a release store operation in thread 2 and a acquire load operation in thread 1 even if that load operation isn't directly reading the value stored by thread 2, provided that there is a "release sequence" between the release store operation and the store that is actually being read as long as: The store that is actually being read is in the same thread as the release store operation. In modification-order there is no store in

问题 In C#, this is the standard code for invoking an event in a thread-safe way: var handler = SomethingHappened; if(handler != null) handler(this, e); Where, potentially on another thread, the compiler-generated add method uses Delegate.Combine to create a new multicast delegate instance, which it then sets on the compiler-generated field (using interlocked compare-exchange). (Note: for the purposes of this question, we don't care about code that runs in the event subscribers. Assume that it's

问题 Assume that we have the following code: class Program { static volatile bool flag1; static volatile bool flag2; static volatile int val; static void Main(string[] args) { for (int i = 0; i < 10000 * 10000; i++) { if (i % 500000 == 0) { Console.WriteLine("{0:#,0}",i); } flag1 = false; flag2 = false; val = 0; Parallel.Invoke(A1, A2); if (val == 0) throw new Exception(string.Format("{0:#,0}: {1}, {2}", i, flag1, flag2)); } } static void A1() { flag2 = true; if (flag1) val = 1; } static void A2()

问题 I have a question regarding a GCC-Wiki article. Under the headline "Overall Summary" the following code example is given: Thread 1: y.store (20); x.store (10); Thread 2: if (x.load() == 10) { assert (y.load() == 20) y.store (10) } It is said that, if all stores are release and all loads are acquire , the assert in thread 2 cannot fail. This is clear to me (because the store to x in thread 1 synchronizes with the load from x in thread 2). But now comes the part that I don't understand. It is

问题 The C++ memory model has relaxed atomics, which do not put any ordering guarantees on memory operations. Other than the mailbox example in C which I have found here: http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1525.htm Based on the motivating example in this paper: http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2007/n2153.pdf I was curious about other use cases for this type of synchronization mechanism. 回答1: A simple example that I see in my work frequently is a stats counter. If

问题 The C++0x draft has a notion of fences which seems very distinct from a CPU/chip level notion of fences, or say what the linux kernel guys expect of fences. The question is whether the draft really implies an extremely restricted model, or the wording is just poor and it actually implies true fences. For example, under 29.8 Fences it states things like: A release fence A synchronizes with an acquire fence B if there exist atomic operations X and Y, both operating on some atomic object M, such

问题 The C++0x draft has a notion of fences which seems very distinct from a CPU/chip level notion of fences, or say what the linux kernel guys expect of fences. The question is whether the draft really implies an extremely restricted model, or the wording is just poor and it actually implies true fences. For example, under 29.8 Fences it states things like: A release fence A synchronizes with an acquire fence B if there exist atomic operations X and Y, both operating on some atomic object M, such

问题 I'm checking how the compiler emits instructions for multi-core memory barriers on x86_64. The below code is the one I'm testing using gcc_x86_64_8.3 . std::atomic<bool> flag {false}; int any_value {0}; void set() { any_value = 10; flag.store(true, std::memory_order_release); } void get() { while (!flag.load(std::memory_order_acquire)); assert(any_value == 10); } int main() { std::thread a {set}; get(); a.join(); } When I use std::memory_order_seq_cst , I can see the MFENCE instruction is

问题 I'm intrigued by the following paragraph from the standard (§3.9/4 of ISO/IEC 14882:2011(E) ): The object representation of an object of type T is the sequence of N unsigned char objects taken up by the object of type T , where N equals sizeof(T) . The value representation of an object is the set of bits that hold the value of type T . For trivially copyable types, the value representation is a set of bits in the object representation that determines a value , which is one discrete element of

问题 http://en.cppreference.com/w/cpp/atomic/memory_order, and other C++11 online references, define memory_order_acquire and memory_order_release as: Acquire operation: no reads in the current thread can be reordered before this load. Release operation: no writes in the current thread can be reordered after this store. This seems to allow post-acquire-writes to be executed before the acquire operation, which seems weird too me (usual acquire/release operation semantics restrict movement of all