memory-model | 易学教程

Thread.VolatileRead Implementation

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问题 I'm looking at the implementation of the VolatileRead/VolatileWrite methods (using Reflector), and i'm puzzled by something. This is the implementation for VolatileRead: [MethodImpl(MethodImplOptions.NoInlining)] public static int VolatileRead(ref int address) { int num = address; MemoryBarrier(); return num; } How come the memory barrier is placed after reading the value of "address"? dosen't it supposed to be the opposite? (place before reading the value, so any pending writes to "address"

Does Interlocked.CompareExchange use a memory barrier?

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I'm reading Joe Duffy's post about Volatile reads and writes, and timeliness , and i'm trying to understand something about the last code sample in the post: while (Interlocked.CompareExchange(ref m_state, 1, 0) != 0) ; m_state = 0; while (Interlocked.CompareExchange(ref m_state, 1, 0) != 0) ; m_state = 0; … When the second CMPXCHG operation is executed, does it use a memory barrier to ensure that the value of m_state is indeed the latest value written to it? Or will it just use some value that is already stored in the processor's cache? (assuming m_state isn't declared as volatile). If I

Will two atomic writes to different locations in different threads always be seen in the same order by other threads?

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Similar to my previous question, consider this code -- Initially -- std::atomic<int> x{0}; std::atomic<int> y{0}; -- Thread 1 -- x.store(1, std::memory_order_release); -- Thread 2 -- y.store(2, std::memory_order_release); -- Thread 3 -- int r1 = x.load(std::memory_order_acquire); // x first int r2 = y.load(std::memory_order_acquire); -- Thread 4 -- int r3 = y.load(std::memory_order_acquire); // y first int r4 = x.load(std::memory_order_acquire); Is the weird outcome r1==1, r2==0 and r3==2, r4==0 possible in this case under the C++11 memory model? What if I were to replace all std::memory_order

C++ memory model and race conditions on char arrays

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问题 Basically I have trouble understanding this: (from Bjarne FAQ) However, most modern processors cannot read or write a single character, it must read or write a whole word, so the assignment to c really is ``read the word containing c, replace the c part, and write the word back again.'' Since the assignment to b is similar, there are plenty of opportunities for the two threads to clobber each other even though the threads do not (according to their source text) share data! So how can char

Does std::mutex create a fence?

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问题 If I lock a std::mutex will I always get a memory fence? I am unsure if it implies or enforces you to get the fence. Update: Found this reference following up on RMF's comments. Multithreaded programming and memory visibility 回答1: Unlocking a mutex synchronizes with locking the mutex. I don't know what options the compiler has for the implementation, but you get the same effect of a fence. 回答2: As I understand this is covered in: 1.10 Multi-threaded executions and data races Para 5: The

How to understand happens-before consistent

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In chapter 17 of JLS , it introduce a concept: happens-before consistent. A set of actions A is happens-before consistent if for all reads r in A, where W(r) is the write action seen by r, it is not the case that either hb(r, W(r)) or that there exists a write w in A such that w.v = r.v and hb(W(r), w) and hb(w, r)" In my understanding, it equals to following words: ..., it is the case that neither ... nor ... So my first two questions are: is my understanding right? what does "w.v = r.v" mean? It also gives an Example: 17.4.5-1 Thread 1 Thread 2 B = 1; A = 2; r2 = A; r1 = B; In first

Can modern x86 hardware not store a single byte to memory?

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Speaking of the memory model of C++ for concurrency, Stroustrup's C++ Programming Language, 4th ed., sect. 41.2.1, says: ... (like most modern hardware) the machine could not load or store anything smaller than a word. However, my x86 processor, a few years old, can and does store objects smaller than a word. For example: #include <iostream> int main() { char a = 5; char b = 25; a = b; std::cout << int(a) << "\n"; return 0; } Without optimization, GCC compiles this as: [...] movb $5, -1(%rbp) # a = 5, one byte movb $25, -2(%rbp) # b = 25, one byte movzbl -2(%rbp), %eax # load b, one byte, not

Is Dalvik's memory model the same as Java's?

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问题 Is Dalvik\'s memory model the same as Java\'s? I am particularly interested in whether reads and writes of reference and non- long /non- double primitive variables are atomic, but I would also like to know whether there are any differences between the two platforms\' memory models. 回答1: As of 4.0 (Ice Cream Sandwich), Dalvik's behavior should match up with JSR-133 (the Java Memory Model). As of 3.0 (Honeycomb), most of the pieces were in place, but some minor things had been overlooked that

Does Interlocked.CompareExchange use a memory barrier?

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问题 I\'m reading Joe Duffy\'s post about Volatile reads and writes, and timeliness, and i\'m trying to understand something about the last code sample in the post: while (Interlocked.CompareExchange(ref m_state, 1, 0) != 0) ; m_state = 0; while (Interlocked.CompareExchange(ref m_state, 1, 0) != 0) ; m_state = 0; … When the second CMPXCHG operation is executed, does it use a memory barrier to ensure that the value of m_state is indeed the latest value written to it? Or will it just use some value

Will two atomic writes to different locations in different threads always be seen in the same order by other threads?

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问题 Similar to my previous question, consider this code -- Initially -- std::atomic<int> x{0}; std::atomic<int> y{0}; -- Thread 1 -- x.store(1, std::memory_order_release); -- Thread 2 -- y.store(2, std::memory_order_release); -- Thread 3 -- int r1 = x.load(std::memory_order_acquire); // x first int r2 = y.load(std::memory_order_acquire); -- Thread 4 -- int r3 = y.load(std::memory_order_acquire); // y first int r4 = x.load(std::memory_order_acquire); Is the weird outcome r1==1, r2==0 and r3==2, r4