isa

问题 and sorry for the title, i couldn't imagine a way to express this in english. So i'm writing a little game in assembly for a course, and, inside of two for loops, i copy the pixel data from the "bomb" vector of pixels, to the "area" vector of pixels, which will later be drawn to the screen. In C, it should look like this: int x, y; for(int i=0;i<32;i++) for(int j=0;j<32;j++) area[x+i][y+j]=bomb[i][j]; Using masm assembler and notepad++ to write the code, i got mov ecx, 0 ; my i outerloop: cmp

问题 After skimming the risc-v isa doc, it gives me the impression that the riscv supports both 16bits(RVC), 32bits(RV32I), 64bits(RV64I) length of instructions. For the RV32I: immediate is signed extented to 32 bits Instruction length:32 bits Register size: 32 bits Memory address: 32 bits For the RV64i: immediate is signed extented to 64 bits Instruction length:32 bits Register size: 64 bits Memory address: 64 bits It seems both RV32I & RV64I use 32 bits instruction size and the difference

问题 If I am correct, an ISA is the set of instructions in a machine language. So are the instructions in an ISA 0/1 binary sequences? Why did I see the instructions in an ISA are human-readable words in books? Are the human-readable words that represent the instructions in an ISA the same as the mnemonics used in the assembly language of the ISA? Are the human-readable words of the instructions in an ISA part of the ISA? If yes, is there a translation process that translate from the human

问题 I have a complicated problem, exacerbated by the fact I don't really know where to start! Over the last few years, I've developed a number of php web-based systems. When I built them, our network was ropey at best, so I thought nothing of creating my own username/password stuff. Since then, our network has become a lot more robust, our admins have installed an ISA server for various other things and my apps are left as frustrating relics that people forget their passwords and are never sure

问题 I am trying to add jal functionality to the following but I am stuck with how does it work. I know that it stores the old PC+4 value in the $ra register and then transfers the control to the function which transfers back the control by return $ra but how do I implement it in the hardware? 回答1: There are two things you need to do. Add a mux at the input of the Registers so that the PC+4 value can be selected as the data to be written. With the appropriate control signal this will allow you to

问题 I am trying to wrap my head around what, exactly, an instruction set architecture (ISA) is. From what I have read, I have two interpretations. My first interpretation is that an ISA is the set of all registers, assembly instructions and pseudo instructions, assembler directives, and instruction formats that comprise the assembly language that can be used to program a processor that implements the instruction set. My second interpretation is that an ISA is a bijective mapping between computer

问题 I've been looking into the Software Developer's Manual of the x86 architecture trying to brush my reverse engineering skills. I know that the architecture is complex and backwards compatible with previous generations. With newer generations some of the older documentation parts get left out. But one of the disturbing explanations and misinterpretations were instructions similar to this one: 80 /2 ib So instructions based on the following 80 OpCode would be followed by a MOD/RM/REG byte. One

问题 Closed . This question is opinion-based. It is not currently accepting answers. Want to improve this question? Update the question so it can be answered with facts and citations by editing this post. Closed last month . I'm currently taking a class that covers the MIPS ISA and one thing that I noticed is the split in temporary registers: Temporary registers $t0 to $t7 are stored in $8 to $15 , but $t8 and $t9 are stored in $24 and $25 . Why is this? Why not make the temporary registers

问题 I was simply wondering, how an ISA relationship in an ER diagram would translate into tables in a database. Would there be 3 tables? One for person, one for student, and one for Teacher? Or would there be 2 tables? One for student, and one for teacher, with each entity having the attributes of person + their own? Or would there be one table with all 4 attributes and some of the squares in the table being null depending on whether it was a student or teacher in the row? NOTE: I forgot to add

问题 I am doing an assignment on single cycle MIPS processor and I am a little confused on the addiu instruction. On this website, as my reference the author states that the immediate will be sign extened Description: Adds a register and a sign-extended immediate value and stores the result in a register Operation: $t = $s + imm; advance_pc (4); Syntax: addiu $t, $s, imm Encoding: 0010 01ss ssst tttt iiii iiii iiii iiii If I have the following instructions lui $3,0x1001 addiu $3,$3,0x8010 and I