intel

问题 I have Matlab R2012b for Ubuntu 64 bits. I have a Intel Core i3 CPU M 330 @ 2.13GHz × 4. I want to use parfor to parallelize 4 loops at same time. Because Intel Core i3 has 2 Cores and 4 Threads I use this code: if matlabpool('size') == 0 % checking to see if my pool is already open matlabpool(4) else matlabpool close matlabpool(4) end And I obtain the following error: Error: You requested a minimum of 4 workers, but the cluster "local" has the NumWorkers property set to allow a maximum of 2

问题 I have a Intel Core i5-2450m (2 physical processors and 4 logical processors) and I want to find a way to count logical and physical cores on AMD and Intel CPUs. But, after some searches I noticed something strange. Instead of returning 4 logical units, my code give me 16. static int8_t LogicalProcCount(void) { if ( !Hyperthreading ) return 1; uint32_t unused, ebx; CPUID(1, unused, ebx, unused, unused); return (int8_t) ( (ebx >> 16 ) & 0xFF ); } 回答1: CPUID.1:EBX[23:16] represents the maximum

问题 When I am installing Intel HAXM I have the following error: This computer meets the requirements for HAXM, but Intel Virtualization technology (VT-x) is not turned on. HAXM cannot be installed until VT-x is enabled. So, I have checked my BiOS, VT-x is supported, and I enabled Intel virtualization (it wasn't before). I also have checked if it was really enabled with the Intel virtualization technology detection tool (Intel Processor Identification Utility) and it says: Intel(R) Virtualization

问题 I`m looking into UPnP with the help of the generated stack for java/android created with the device builder with came with the UPnP tools from intel. to make an android application that is the control point in the UPnP system. source of tools: http://opentools.homeip.net/dev-tools-for-upnp To help me understand the principle of these tools I created a network light and generated the stack for android. But i can`t seem to work out how to turn on and off the networklight. can someone give my a

问题 I have read this answer, but I need to know what is the longest instruction length on Intel 386(which is 32-bit not 64 bit) without using any instruction prefixes. Based on the manual, it is probably 12: Opcode: 2 bytes MOD/Rm: 1 byte SIB: 1 byte Displacement: 4 bytes Immediate: 4 bytes Total: 12 Is this the correct answer? 回答1: On 80386 that would be 11 bytes: Opcode: 1 byte MOD/RM: 1 byte SIB: 1 byte Displacement: 4 bytes Immediate: 4 bytes The 2-byte opcodes are using the 0Fh instruction

问题 According to this question, the use of threadprivate with openmp is problematic. Here is a minimum (non-)working example of the problem: #include"omp.h" #include<iostream> extern const int a; #pragma omp threadprivate(a) const int a=2; void my_call(){ std::cout<<a<<std::endl; }; int main(){ #pragma omp parallel for for(unsigned int i=0;i<8;i++){ my_call(); } } This codes compiles with intel 15.0.2.164 but not with gcc 4.9.2-10. gcc says: g++ -std=c++11 -O3 -fopenmp -O3 -fopenmp test.cpp -o

问题 Is it possible to run mono on intel's phi coprocessors? From what i have understood they are operating a form of Linux but i haven't managed to find a concrete answer. If it is possible, are there any sort of limitations/issues? I'm looking to run some C# code on them as i had heard there are no issues with warp divergence, or something similar. 回答1: It is entirely possible to run mono on Phi due to the fact that it is just running a standard Linux kernel. Any specific shared libraries you

问题 Disclamer: I'm using Intel Compiler 2017 and if you want to know why I'm doing this, go at the end of the question. I have this code: class A{ vector<float> v; ... void foo(); void bar(); } void A::foo(){ for(int i=0; i<bigNumber;i++){ //something very expensive //call bar() many times per cycle; } } void A::bar(){ //... v.push_back(/*something*/); } Now, let's suppose I want to parallelize foo() since it's very expensive. However, I can't simply use #pragma omp parallel for because of v.push

问题 This question already has answers here : Does each core has its own private set of registers? (2 answers) What does multicore assembly language look like? (10 answers) Why each logical CPU has it's own CR3 register in case of multithreading? (1 answer) Can I temporarily enable FTZ and DAZ floating-point modes for a thread? (1 answer) Closed last year . I'm trying to read the Intel documentation on the CPU registers, and the question came up that I can't seem to find an answer to. Say, all of

问题 How do you suppose to know that when 'mul ecx' was executed. ECX would be multiplied with EAX? And not with EBX or EDX? mul ecx, eax would make more sense though. 回答1: The instruction set is simply defined that way. Intel could have defined it in other ways, including ways that would have allowed you to completely specify input and output registers, but they did not. The excuse is arguably that at the time the various multiply instructions were added to the instruction set of the CPU (8086