hardware

Ops per cycle ARM Cortex CPUs?

廉价感情. 提交于 2019-12-13 07:46:40
问题 I need the number of operations per cycle that an ARM processor can execute, in particular those of Cortex-A7, Cortex-A9 and Cortex-A15. I can't find anything online! Thank you EDIT: I need it for calculating the theoretical peak performance. 回答1: I have not looked into integers yet but for single and double floating operations per cycle this is what I have come up with so far (from flops-per-cycle-for-sandy-bridge-and-haswell-sse2-avx-avx2, peak-flops-per-cycle-for-arm11-and-cortex-a7-cores

RS-232 communication with RPi

ぃ、小莉子 提交于 2019-12-13 04:13:47
问题 This is a follow up question to this original post: RaspberryPi RS-232 trouble I made changes to my code per the accepted answer, the terminal is now set up for blocking and canonical input. The read() now works as expected, with the exception of the very first read(which is typically some extra random symbols mixed with some good data) I get single lines of data from the laser range finder representing exactly what I expect to see. However, I now have an issue that if I do too many reads,

Why is it not possible to read an unaligned word in one step?

六眼飞鱼酱① 提交于 2019-12-12 14:34:22
问题 Given that the word size of a CPU allows it to address every single byte in the memory. And given that via PAE CPUs can even use more bits than its word size for addressing. What is the reason that a CPU cannot read an unaligned word in one step? For example, in a 32-bit machine you can read the 4-byte chunk starting at position 0, but you cannot read the one starting at position 1 (you can but it needs several steps). Why can CPUs not do that? 回答1: The problem is not with the ability of the

How does the keyboard input get into the terminal? [closed]

匆匆过客 提交于 2019-12-12 13:39:07
问题 It's difficult to tell what is being asked here. This question is ambiguous, vague, incomplete, overly broad, or rhetorical and cannot be reasonably answered in its current form. For help clarifying this question so that it can be reopened, visit the help center. Closed 8 years ago . Can someone describe the way how keyboard input gets on the Computer Screen?! What kind of software/hardware is involved? my question is what happens roughly or exactly when i press a key on my keyboard? what

How do you control the Apple MacBook “Sleep” light?

霸气de小男生 提交于 2019-12-12 12:32:24
问题 I would like to control the "sleep" light on a MacBook or iMac. That is, I want to be able to make it turn on, turn off, and pulsate. I am happy to do this in usermode or in kernel mode. I assume I'll need root. Any ideas? 回答1: You don't, at least not in any way that will not involve possibly bricking your machine. The sleep light is controlled (on intel macs) by the SMC, and you can't even get to it through Open Firmware. There is hope, after a fashion, as Apple has actually released

Are the GDI functions BitBlt and StretchBlt hardware accelerated in Win32?

自闭症网瘾萝莉.ら 提交于 2019-12-12 10:47:47
问题 I can't seem to get a definite answer to this via searching. Are the Win32 blitting operations hardware accelerated (GDI, not GDI+). I don't know how these functions interface with the graphics driver. Is there any function call to verify this functionality, like ?GetCaps? for a specific graphics device (win32 graphics device) to see if these functions are receiving hardware acceleration? 回答1: According to this, GDI is only hardware accelerated on windows 7 onwards. This lists how to specify

Incrementing a counter variable in verilog: combinational or sequential

假装没事ソ 提交于 2019-12-12 09:54:26
问题 I am implementing an FSM controller for a datapath circuit. The controller increments a counter internally. When I simulated the program below, the counter was never updated. reg[3:0] counter; //incrementing counter in combinational block counter = counter + 4'b1; However, on creating an extra variable, counter_next, as described in Verilog Best Practice - Incrementing a variable and incrementing the counter only in the sequential block, the counter gets incremented. reg[3:0] counter, counter

What tools can I use to determine the hardware requirements of my application?

为君一笑 提交于 2019-12-12 07:49:15
问题 For regular readers: The saga™ continues... My app runs fine on my development machine - which was purchased (5 years ago) as a fairly good gaming rig. As such, it's 64bit, has a 2.2GHz clock-speed and has 2GB of memory. The machines at work however, are standard Dell issue office computers and really struggle to even start my app, let alone run it. ( Explanation... I can imagine people screaming at me: "What on earth are you doing to require a spec like that?" Well, I'm doing a lot of real

Can Intel PT (Processor Trace) be disabled/configured from within an OS?

坚强是说给别人听的谎言 提交于 2019-12-12 07:38:26
问题 I have a number of questions about Intel PT (have been trying to decode the manual but is very difficult). My questions are: I am trying to find out if Intel PT can be disabled or reconfigured from within an OS, or, more generally, from within the system it is providing a trace of. Does Intel PT generate events on writes to specific registers - such as CR3, IDTR, etc Can Intel PT write values back to the system - i.e. can an external debugging machine actively perform writes to register,

hardware-locked licensing: which hardware pieces should i use? [duplicate]

守給你的承諾、 提交于 2019-12-12 07:18:25
问题 This question already has answers here : Is there really any way to uniquely identify any computer at all (4 answers) Closed 4 years ago . I've recently implemented a hardware-locked licensing system with fuzzy-matching to handle changes in hardware without requiring a re-activation, but i need more hardware pieces to match to be more secure / create more reliable fuzzy-matching. Right now I'm matching against the following: Physical mac address Hard-drive serial number RAM part number /