embedded

Embedded C UART conventions

血红的双手。 提交于 2021-01-27 18:30:51
问题 I need advice on proper way of handling UART communication. I feel like I've done handling sending serial commands over UART well but I don't know if the way I'm parsing the response or receiving serial data is the best way to do it. Any tips are appreciated but I just want to know if there's a better more and elegant way to parse UART RX. This is for an MSP430 uC by the way... First I have these declared in the header file: const unsigned char *UART_TX_Buffer; unsigned char UART_TX_Index;

select() does not seem to work on TTY

眉间皱痕 提交于 2021-01-27 17:04:20
问题 I'm currently writing a program that needs to communicate with an AT interface over an UART interface (the operating system is Linux). But I'm having trouble using select() on the file descriptor. For some reason select does not consider the file descriptor to be ready for reading, but To narrow down the problem I have used the following program. int main() { char buffer[BSIZE]; fd_set rfds; int ret; struct termios cnf; struct timeval tv; fd = open("/dev/ttyO1", O_RDWR); // Have also tried to

Change priority level level of running interrupt handler?

前提是你 提交于 2021-01-27 05:49:23
问题 I am trying to implement the following pseudocode on a cortex-m3 controller, (STM32L151 in particular) void SysTick_Handler() { do_high_priority_periodic_tasks(); // not to be interrupted lower_interrupt_priority(); do_low_priority_periodic_tasks(); // these may be interrupted } In other words, run the first part with priority level 0, then somehow lower the current interrupt priority to 15, so that the rest could be preempted by other hardware interrupts. One idea is to move do_low_priority

ARM Cortex-M3 boot from RAM initial state

爱⌒轻易说出口 提交于 2021-01-21 05:56:51
问题 I have two ARM Cortex-M3 chips: STMF103C8T6 and STM32F103VET6 . When set to boot from RAM, initial state of STMF103C8T6 PC register is 0x20000108 ; 0x200001e0 for STM32F103VET6 . I am unable to find and information about these addresses in the datasheets. Why are they booted this way and where I can find some information about it? Edit: To clarify. When chip set to boot from flash, PC register points to the location of the Reset Handler. This address is provided in the reset vector table at

Utilities Zynq in a PL only configuration

帅比萌擦擦* 提交于 2021-01-14 02:47:52
Is it possible to utilize Zynq in a PL-only configuration? You don’t need to have the ARM instantiated in your design but nevertheless the ARM is always present to take care of the configuration task. The Boot ROM code will always get executed at POR and the hard PS will boot. Remember, Zynq is a standalone processor and does not require PL configuration as is needed for MicroBlaze. Here is what you need to do if you are using PL only: Create an FSBL for the board (FSBL is needed for loading the bitstream). If you already have an SDK project for this board for any reference design (just make

Hibernate Embedded/Embeddable not null exception

£可爱£侵袭症+ 提交于 2020-12-30 06:43:13
问题 In the owning class: ... @Embedded private LatLon location; ... In the referenced class: @Embeddable public class LatLon implements Serializable { private double lat; private double lon; ... } When I try to save an instance of the owning class with a null value for LatLon : org.hibernate.PropertyValueException: not-null property references a null or transient value: com.*.location . What can I do to allow this value to be null in the owning class? I have tried making it Nullable and that had

Hibernate Embedded/Embeddable not null exception

眉间皱痕 提交于 2020-12-30 06:41:35
问题 In the owning class: ... @Embedded private LatLon location; ... In the referenced class: @Embeddable public class LatLon implements Serializable { private double lat; private double lon; ... } When I try to save an instance of the owning class with a null value for LatLon : org.hibernate.PropertyValueException: not-null property references a null or transient value: com.*.location . What can I do to allow this value to be null in the owning class? I have tried making it Nullable and that had

ARM TrustZone's Secure/Normal world vs. OS's kernel/user mode or x86's Ring0/1/2/3?

為{幸葍}努か 提交于 2020-12-29 04:53:11
问题 I read document like this TrustZone Security Whitepaper. It describles that all resources like CPU, memory and others are divided by Secure World and Normal World . Programs in Normal World can not access resources in Secure World. You must call a special instrustion SMC to switch from Normal to Secure world (go through Monitor Mode). As I know, modern OS like Linux provides Kernel Mode and User Mode . User processes can not access resources located in kernel space, but invoke system calls. I

Embedded System: Memory Layout when using Assembly Language

若如初见. 提交于 2020-12-12 05:38:59
问题 From my understanding, an embedded system runs machine code. There are multiple ways to generate this code. One is to write a programm in a higher level language like C and use a compiler to get such code. An other way is writing instructions in the assambly language for that embedded system and using an assembler to translate that to machine code. Now we got machine code which is loaded to the system and executed. The programm code is stored in non-volatile memory. Now, if the programm code

Embedded System: Memory Layout when using Assembly Language

倾然丶 夕夏残阳落幕 提交于 2020-12-12 05:38:04
问题 From my understanding, an embedded system runs machine code. There are multiple ways to generate this code. One is to write a programm in a higher level language like C and use a compiler to get such code. An other way is writing instructions in the assambly language for that embedded system and using an assembler to translate that to machine code. Now we got machine code which is loaded to the system and executed. The programm code is stored in non-volatile memory. Now, if the programm code