cpu

I'm trying to get the CPU serial or motherboard serial using C or Python for licensing purposes. Is it possible? I'm using Linux . You need to use the CPUID instruction. CPUID Most C compilers have some support for inline assembly, but you will need to know what you are doing. Under Linux, you could use "lshw -quiet -xml" and parse its output. You'll find plenty of system information here: cpuid, motherboard id and much more. You can get the CPUID. Maybe linux command 'dmidecode' can help you. You can exec this command,or load the source code of "dmidecode". Next is the output of "dmidecode -t

I understand atomicity can be guaranteed on operations like xsub() , without using the LOCK prefix, by relying on the cache coherency protocol (MESI/MESIF). 1) How can the cache coherency protocol do this??? Its making me wonder if the cache coherency protocol can enforce atomicity, why do we need special atomic types/instructions etc? 2) If MOSI implements atomic instructions across multi-core systems then what is the purpose of LOCK ? Legacy? 3) If MOSI implements atomic instructions and MOSI is used for all instructions- then why do atomic instructions cost so much? Surely the performance

Well, they bring (should bring at least) great increase in performance, isn’t it? So, I haven’t seen any Linux kernel sources, but ‘d love to ask: are they used somehow? (In this case – there must be some special “code-cap” for system that has no such instructions?) The SSE and MMX instruction sets have limited value outside of audio/video and gaming work. You might find a few explicit uses in dark corners of the kernel, but I wouldn't count on it. The answer in the general case is "no, they are not used", nor are they used in most non-kernel/userspace applications. The kernel does sometimes

I need to prevent the processor from entering an idle state (non C0 C state). Admittedly I do not know much about processor C and P states so bear with me. We use a camera from a third party vendor which occasionally delivers corrupted frames. The vendor has determined that when the CPU enters an idle state it interferes with the transmission of the frame over the firewire. To confirm this I used the following code on a Windows 7 PC and indeed, disabling the idle states resolved the issue. //WIN7 const DWORD DISABLED = 1; const DWORD ENABLED = 0; GUID *scheme; PowerGetActiveScheme(NULL,

At first glance it seems like a good idea to let the hard disk write to RAM on its own, without CPU instructions copying data, particularly with the success of asynchronous networking in mind. But the Wikipedia article on Direct Memory Access (DMA) states this: With DMA, the CPU gets freed from this overhead and can do useful tasks during data transfer (though the CPU bus would be partly blocked by DMA). I don't understand how a bus line can be "partly blocked". Presumably memory can be accessed by one device at the time, and it then seems like there is little useful work the CPU can actually

I understand the part of the paper where they trick the CPU to speculatively load the part of the victim memory into the CPU cache. Part I do not understand is how they retrieve it from cache. They don't retrieve it directly (out of bounds read bytes are not "retired" by the CPU and cannot be seen by the attacker in the attack). A vector of attack is to do the "retrieval" a bit at a time. After the CPU cache has been prepared (flushing the cache where it has to be), and has been "taught" that a if branch goes through while the condition relies on non-cached data, the CPU speculatively executes

Closed. This question is off-topic. It is not currently accepting answers. Learn more . Want to improve this question? Update the question so it's on-topic for Stack Overflow. Closed 6 years ago . Java is a beautifully crafted OO language but the first thing I noticed is how slow it is (compared to C++). This is probably because it has to go through another layer of translation (the VM) instead of running directly in the CPU's native microcode. My question: Do you know of any attempts to create Java-specific CPU's that run Java natively without requiring the software-implemented VM? Sun