cpu-architecture | 易学教程

Out-of-order execution vs. speculative execution

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I have read the wikipedia page about out-of-order execution and speculative exectution . What I fail to understant though are the similarities and differences. It seems to me that speculative execution uses out-of-order execution when it has not determined the value of a condition for example. The confusion came when I read the papers of Meltdown and Spectre and did additional research. It is stated in the Meltdown paper that Meltdown is based on out-of-order execution, while some other resources including the wiki page about sepeculative execution state that Meltdown is based on speculative

Why is division more expensive than multiplication?

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I am not really trying to optimize anything, but I remember hearing this from programmers all the time, that I took it as a truth. After all they are supposed to know this stuff. But I wonder why is division actually slower than multiplication? Isn't division just a glorified subtraction, and multiplication is a glorified addition? So mathematically I don't see why going one way or the other has computationally very different costs. Can anyone please clarify the reason/cause of this so I know, instead of what I heard from other programmer's that I asked before which is: "because". CPU's ALU

What exactly happens when a skylake CPU mispredicts a branch?

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问题 I'm trying to understand in detail what happens to instructions in the various stages of the skylake CPU pipeline when a branch is mis-predicted, and how quickly instructions from the correct branch destination can start executing. So lets label the two code paths here as red (the one predicted, but not actually taken) and green (the one taken, but not predicted). So questions are: 1. How far through the pipeline does the branch have to get before red instructions start being discarded (and

Does Program Counter hold current address or the address of the next instruction?

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问题 Being a beginner and self-learner, I am learning assembly and currently reading the chapter 3 of the book, The C Companion by Allen Hollub. I can't understand the description of Program Counter or PC he describes in an imaginary demo machine with two byte word. Here is the description of PC in page 57. "The PC always holds the address of the instruction currently being executed. It is automatically updated as each instruction executed to hold the address of the next instruction to be executed

Why is x86 little endian?

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A real question that I've been asking myself lately is what design choices brought about x86 being a little endian architecture instead of a big endian architecture? Largely, for the same reason you start at the least significant digit (the right end) when you add—because carries propagate toward the more significant digits. Putting the least significant byte first allows the processor to get started on the add after having read only the first byte of an offset. After you've done enough assembly coding and debugging you may come to the conclusion that it's not little endian that's the strange

With variable length instructions how does the computer know the length of the instruction being fetched? [duplicate]

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问题 This question already has answers here : Instruction decoding when instructions are length-variable (4 answers) Closed 5 months ago . In architectures where not all the instructions are the same length, how does the computer know how much to read for one instruction? For example in Intel IA-32 some instructions are 4 bytes, some are 8 bytes, so it how does it know whether to read 4 or 8 bytes? Is it that the first instruction red when the machine is powered on has a known size and each

After update to Xcode 5 - ld: symbol(s) not found for architecture armv7 or armv7s linker error

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问题 I just updated my iPhone 4S software to iOS 7 Beta 2 while I was in the middle of putting the final touches on a new app (Phonegap).. not a good idea! After it was done Xcode didn't detect my iPhone so I installed Xcode 5 beta. After tinkering around with it I finally got it to detect my phone. The only problem now is there is an error with the architecture used. Here are the errors being produced: ld: warning: ignoring file /Users/-----------/Library/Developer/Xcode/DerivedData/testtest

What is a microcoded instruction?

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问题 I have seen a lot of literature referencing microcoded instructions. What are these and why they are used? 回答1: A CPU reads machine code and decodes it into internal control signals that send the right data to the right execution units. Most instructions map to one internal operation, and can be decoded directly. (e.g. on x86, add eax, edx just sends eax and edx to the integer ALU for an ADD operation, and puts the result in eax.) Some other single instructions do much more work. e.g. x86's

What does the R stand for in RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP? [duplicate]

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问题 This question already has an answer here: What do the E and R prefixes stand for in the names of Intel 32-bit and 64-bit registers? 1 answer The x86 assembler language has had to change as the x86 processor architecture has changed from 8bit to 16bit to 32bit and now 64bit. I know that in 32bit assembler register names (EAX, EBX, etc.), the E prefix for each of the names stands for Extended meaning the 32bit form of the register rather than the 16bit form (AX, BX, etc.). What does the R

Out-of-order instruction execution: is commit order preserved?

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问题 On the one hand, Wikipedia writes about the steps of the out-of-order execution: Instruction fetch. Instruction dispatch to an instruction queue (also called instruction buffer or reservation stations). The instruction waits in the queue until its input operands are available. The instruction is then allowed to leave the queue before earlier, older instructions. The instruction is issued to the appropriate functional unit and executed by that unit. The results are queued. Only after all older