assembly

问题 This question is inspired by a Reddit question in r/osdev except that this question focuses on the SS register. One may say RTFM (ISA entry for MOV), but when this question comes up it can get varying answers even among OS developers. Question : Should using the MOV instruction to set SS to 0x0000 cause a general protection fault #GP(0) in 64-bit mode? For example: If I am in 64-bit mode with a Current Privilege level (CPL) of 0, should I expect to see a #GP(0) with this code snippet: NULL

问题 This question is inspired by a Reddit question in r/osdev except that this question focuses on the SS register. One may say RTFM (ISA entry for MOV), but when this question comes up it can get varying answers even among OS developers. Question : Should using the MOV instruction to set SS to 0x0000 cause a general protection fault #GP(0) in 64-bit mode? For example: If I am in 64-bit mode with a Current Privilege level (CPL) of 0, should I expect to see a #GP(0) with this code snippet: NULL

问题 This question is inspired by a Reddit question in r/osdev except that this question focuses on the SS register. One may say RTFM (ISA entry for MOV), but when this question comes up it can get varying answers even among OS developers. Question : Should using the MOV instruction to set SS to 0x0000 cause a general protection fault #GP(0) in 64-bit mode? For example: If I am in 64-bit mode with a Current Privilege level (CPL) of 0, should I expect to see a #GP(0) with this code snippet: NULL

问题 Lately I've been learning x86 Assembly from the book Programming from the Ground Up, but I have an x86-64 computer, so things start to go wrong at one point (pretty early in the book). I got to the part where I'm dealing with functions, specifically the power example. In this example he pushes the parameters onto the stack and then copies them into registers later in the function. Here's what his code looks like: pushl $3 # second argument pushl $2 # first argument call power # call function

问题 Lately I've been learning x86 Assembly from the book Programming from the Ground Up, but I have an x86-64 computer, so things start to go wrong at one point (pretty early in the book). I got to the part where I'm dealing with functions, specifically the power example. In this example he pushes the parameters onto the stack and then copies them into registers later in the function. Here's what his code looks like: pushl $3 # second argument pushl $2 # first argument call power # call function

问题 In intel instruction, idiv(integer divsion) means signed division. I got the result of idiv , but I don't quite understand the result. - Example 0xffff0000 idiv 0xffff1100 - My wrong prediction As long as I know, quotient should be 0, and remainder should be 0xffff0000 and because... 0xffff0000 / 0xffff1100 = 0 0xffff0000 % 0xffff1100 = 0xffff0000 - However, the result was... Before idiv eax 0xffff0000 # dividend esi 0xffff1100 # divisor edx 0x0 After idiv eax 0xfffeedcc # quotient edx 0x7400

问题 In intel instruction, idiv(integer divsion) means signed division. I got the result of idiv , but I don't quite understand the result. - Example 0xffff0000 idiv 0xffff1100 - My wrong prediction As long as I know, quotient should be 0, and remainder should be 0xffff0000 and because... 0xffff0000 / 0xffff1100 = 0 0xffff0000 % 0xffff1100 = 0xffff0000 - However, the result was... Before idiv eax 0xffff0000 # dividend esi 0xffff1100 # divisor edx 0x0 After idiv eax 0xfffeedcc # quotient edx 0x7400

问题 I want to understand the importance of Q flag in ARM Processor. I know there are certain instructions like QADD,QSUB etc. But I need to understand this with some examples which will clarify the concept. Please explain me. Thank you 回答1: This is explained in the "ARM Architecture Reference Manual" (ARM DDI 0100E): Bit[27] of the CPSR is a sticky overflow flag, also known as the Q flag. This flag is set to 1 if any of the following occurs: Saturation of the addition result in a QADD or QDADD

问题 I want to understand the importance of Q flag in ARM Processor. I know there are certain instructions like QADD,QSUB etc. But I need to understand this with some examples which will clarify the concept. Please explain me. Thank you 回答1: This is explained in the "ARM Architecture Reference Manual" (ARM DDI 0100E): Bit[27] of the CPSR is a sticky overflow flag, also known as the Q flag. This flag is set to 1 if any of the following occurs: Saturation of the addition result in a QADD or QDADD

问题 From https://www.felixcloutier.com/x86/div: ... temp ← AX / SRC; IF temp > FFH THEN #DE; (* Divide error *) ELSE AL ← temp; AH ← AX MOD SRC; FI; ... For div ah the SRC would be ah . IMHO temp will always be larger than FFH and therefore the exception will be raised since: AX = 256*AH+AL temp = AX / AH = (256*AH+AL)/AH = 256 + AL/AH temp is over FFH Do I miss something here? 回答1: That's correct, just like div edx it's never usable without faulting. The criterion for 2N/N => N-bit div not