I have a make file that contains this code:
all: main.o Etudiant.o gcc -lobjc -o program main.o Etudiant.o main.o:main.m Etudiant.h gcc -c main.m Etudiant.o:Etudiant.m Etudiant.h gcc -c Etudiant.m When I write this in the shell command:
$make I got this:
make: **** No targets specified and no makefile found. Stop. How do I fix this?
Mmm... makefiles. Whee.
All that whitespace at the beginning of the line. That has to be tabs. Or Make will barf up a really obscure error. Make sure those are tabs and try again.
See the button on the left side of the keyboard labeled "tab". Delete the spaces and hit that once to insert a tab character.
Try make all. IIRC (been a few years since I've had to muck with makefiles) most makes will default to all, but maybe yours isn't.
Extension doesn't matter.
"no Makefile found" means... well.. that Make didn't even see the makefile. The suggestions to rename the Makefile.m to Makefile are correct. As well, the whole tab vs. whitespace thing is certainly pertinent.
and no makefile found
If you just type make with no arguments or make all, make will look for a file called Makefile in the current directory. If it's not there, you get the error you saw. make will not look in subdirectories for Makefile nor will it accept a file called Makefile.m.
Re:
$ Make Make: * No targets specified and no makefile found. Stop.
I just had this error and found that the Makefile extension (none) had been converted to .bat somewhere along the line.
Just spent a few insanely frustrating moments with this error. My mistake was not all that subtle: I titled the makefile MakeFile not Makefile, so even using the -f Makefile command (forcing the makefile name) still resulted in not-found, because it was MakeFile, not Makefile.