Inter Purley Platform feature:eSPI

匿名 (未验证) 提交于 2019-12-02 23:04:42

Intel eSPI

Enhanced Serial Peripheral Interface(eSPI), 用来代替之前的LPC(Low Pin Count Interface)
- 工作在1.8V
- Better bandwidth and performance: 50MHz, 64~256B payload vs. 4B for LPC
- 更少的管脚数: ~15~20 pin reduction compared to LPC solution

eSPI 与 LPC 比较

LPC

链接百度文库:LPC总线介绍
LPC 由7根必选信号以及6根可选信号组成
Communication over LPC

eSPI

链接豆丁网:eSPI
eSPI: Enhanced SPI, interface between SOC/PCH and EC/SIO/BMC,用来替代LPC/SMBUS/PECI,工作在1.8v,工作频率10~66MHz
Communication over eSPI

Skylake eSPI/PLC

  • Pin List
  • Specification List
  • Performance Compare


Reference:
[1]: IOTG_Purley_Snapshot_2017ww26.pdf
[2]: IOTG_Purley_Design_In.pdf
[3]: https://wenku.baidu.com/view/22dc31ed844769eae009edf5.html
[4]: http://www.docin.com/p-2060537856.html

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