问题
I am using iMX6ULL system-on-module on my custom board.
I am struggling with UART, GPIOs of my custom board. I have solved the SPI issue on my board but later I got to know about another issue with my board and that's why I thought to ask a new question.
I am able to activate desired UART port and SPI port for my board. But I got to know that my peripheral sensors which are soldered on my custom board have TX and RX lines swapped. I was trying to swap tx rx pins of UART5 of the imx6ull soc with device tree modification. For that, I am trying to enable DCE Mode for uart5 (By Default, colibri module has DTE mode activated). However, when i define (redefine) pinctrl-0 and pinctrl-name properties in my upper dts file, then uart tty port under /dev/ directory disappears. I have tried to point pinctrl-0 to pinctrl_uart5_their and pinctrl_uart5_own. The pinctrl_uart5_their is copy of pinctrl_uart5 defined in imx6ull-colibri.dtsi file. But the uart port under /dev/ directory disappears. If I comment out pinctrl properties (it means the properties are taken from include files), then uart port appears.
GPIOs are also not working properly. I tried to test them by exporting them by following a guide on toradex developer site and writing 1 and 0 after changing the direction using appropriate commands but it doesn't work for me as output is not reflected on the pins.
Please help me by verifying my device tree and suggesting me the right way to do it.
The device tree is over here:
/dts-v1/;
#include "imx6ull-colibri-nonwifi.dtsi"
#include "imx6ull-colibri-eval-v3.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 256MB on Colibri Evaluation Board V3";
compatible = "toradex,colibri_imx6ull-eval", "fsl,imx6ull";
gpio_additional {
pinctrl-name = "default";
pinctrl-0 = <&pinctrl_additionalgpio>;
status = "okay";
};
};
&iomuxc {
imx6ull-colibri {
pinctrl_additionalgpio: additionalgpios {
fsl,pins = <
MX6UL_PAD_UART2_RTS_B__GPIO1_IO23 0x14 // Pin 34 => GPS SafeBoot
MX6UL_PAD_CSI_DATA00__GPIO4_IO21 0x14 // Pin 101 => 1V8 Power Supply Enable
MX6UL_PAD_LCD_ENABLE__GPIO3_IO01 0x14 // Pin 44 => GPS EXINT
MX6UL_PAD_LCD_DATA07__GPIO3_IO12 0x14 // Pin 46 => GPS RST
MX6UL_PAD_LCD_DATA09__GPIO3_IO14 0x14 // Pin 48 => UNUSED
MX6UL_PAD_LCD_DATA06__GPIO3_IO11 0x14 // Pin 80 => SX1301 RST
>;
};
};
pinctrl_uart5_their: uart5grp_their {
fsl,pins = <
MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX 0x1b0b1
MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX 0x1b0b1
>;
};
pinctrl_uart5_own: uart5grp_own {
fsl,pins = <
MX6UL_PAD_GPIO1_IO05__UART5_DCE_RX 0x1b0b1
MX6UL_PAD_GPIO1_IO04__UART5_DCE_TX 0x1b0b1
>;
};
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
/delete-property/fsl,dte-mode;
fsl,dce-mode;
};
&uart3 {
status = "disabled";
};
&uart4 {
status = "disabled";
};
&uart5 {
status = "okay";
pinctrl-name = "default";
pinctrl-0 = <&pinctrl_uart5_own>;
/delete-property/fsl,dte-mode;
fsl,dce-mode;
};
&ecspi1 {
status = "okay";
};
&i2c1 {
status = "okay";
/* M41T0M6 real time clock on carrier board */
rtc: m41t0m6@68 {
status = "disabled";
};
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&lcdif {
status = "disabled";
};
&ecspi1 {
status = "okay";
};
&mcp258x0 {
status = "disabled";
};
&spidev0 {
status = "okay";
};
EDIT:
I have resolved the issue of UART port being disappeared. The issue was with my device tree as my pinctrl_uart5_their nodes weren't under imx6ull-colibri node (see iomuxc in device tree above).
But I am not able to swap the TX RX Pins of UART5 with DTB. I have found few posts which says it is possible. Also, GPIOs are not working even after following this guide. Find the snapshot of my terminal below:
root@colibri-imx6ull:~# echo 75 > /sys/class/gpio/export
root@colibri-imx6ull:~# echo "out" > /sys/class/gpio/gpio75/direction
root@colibri-imx6ull:~# echo 1 > /sys/class/gpio/gpio75/value
root@colibri-imx6ull:~# echo 1 > /sys/class/gpio/gpio75/value
root@colibri-imx6ull:~# echo 0 > /sys/class/gpio/gpio75/value
root@colibri-imx6ull:~# echo 1 > /sys/class/gpio/gpio75/value
root@colibri-imx6ull:~# cat /sys/kernel/debug/gpio
gpiochip0: GPIOs 0-31, parent: platform/209c000.gpio, 209c000.gpio:
gpio-2 ( |VCC_USB[1-4] ) out lo
gpio-11 ( |enable ) out hi
gpiochip1: GPIOs 32-63, parent: platform/20a0000.gpio, 20a0000.gpio:
gpiochip2: GPIOs 64-95, parent: platform/20a4000.gpio, 20a4000.gpio:
gpio-75 ( |sysfs ) out hi
gpio-90 ( |spi_imx ) out hi
gpiochip3: GPIOs 96-127, parent: platform/20a8000.gpio, 20a8000.gpio:
gpiochip4: GPIOs 128-159, parent: platform/20ac000.gpio, 20ac000.gpio:
gpio-128 ( |cd ) in lo
gpio-129 ( |Wake-Up ) in lo
gpio-130 ( |id ) in lo
Pin 80 in SODIMM pin corresponds to Kernel number 75.
The latest device is below:
/dts-v1/;
#include "imx6ull-colibri-nonwifi.dtsi"
#include "imx6ull-colibri-eval-v3.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 256MB on Colibri Evaluation Board V3";
compatible = "toradex,colibri_imx6ull-eval", "fsl,imx6ull";
gpio_additional {
pinctrl-name = "default";
pinctrl-0 = <&pinctrl_additionalgpio>;
status = "okay";
};
};
&iomuxc {
imx6ull-colibri {
pinctrl_additionalgpio: additionalgpios {
fsl,pins = <
MX6UL_PAD_UART2_RTS_B__GPIO1_IO23 0x14 // Pin 34 => GPS SafeBoot
MX6UL_PAD_CSI_DATA00__GPIO4_IO21 0x14 // Pin 101 => 1V8 Power Supply Enable
MX6UL_PAD_LCD_ENABLE__GPIO3_IO01 0x14 // Pin 44 => GPS EXINT
MX6UL_PAD_LCD_DATA07__GPIO3_IO12 0x14 // Pin 46 => GPS RST
MX6UL_PAD_LCD_DATA09__GPIO3_IO14 0x14 // Pin 48 => UNUSED
MX6UL_PAD_LCD_DATA06__GPIO3_IO11 0x14 // Pin 80 => SX1301 RST
>;
};
pinctrl_uart5_their: uart5grp_their {
fsl,pins = <
MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX 0x1b0b1
MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX 0x1b0b1
>;
};
pinctrl_uart5_own: uart5grp_own {
fsl,pins = <
MX6UL_PAD_GPIO1_IO04__UART5_DCE_TX 0x1b0b1
MX6UL_PAD_GPIO1_IO05__UART5_DCE_RX 0x1b0b1
>;
};
};
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
/delete-property/fsl,dte-mode;
fsl,dce-mode;
};
&uart3 {
status = "disabled";
};
&uart4 {
status = "disabled";
};
&uart5 {
status = "okay";
pinctrl-name = "default";
pinctrl-0 = <&pinctrl_uart5_own>;
// /delete-property/fsl,dte-mode;
// fsl,dce-mode;
};
&ecspi1 {
status = "okay";
};
&i2c1 {
status = "okay";
/* M41T0M6 real time clock on carrier board */
rtc: m41t0m6@68 {
status = "disabled";
};
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&lcdif {
status = "disabled";
};
&ecspi1 {
status = "okay";
};
&mcp258x0 {
status = "disabled";
};
&spidev0 {
status = "okay";
};
来源：https://stackoverflow.com/questions/51884314/device-tree-for-changing-uart-mode-and-enabling-gpios-for-imx6ull-system-on-modu