What if I used Asynchronous reset, Should I have to make as synchronous turned it?

问题

At we make IC( I mean physical design in Hardware). As i know, the input reset is always Asynchronous. I wonder that What if I used Asynchronous reset, Should I have to make into synchronous? or Can we just used asynchronous reset?

回答1:

In fact, if you have flip-flops, which are clocked AND asynchronously resetted, you can start reset asynchronously at any time, but you should end it synchronously. The reason for this is simple: imagine that truly async. reset ends simultaneously with the clock edge. You can easily get metastables here, or, for example, half of your flipflops would accept clock edge, while other half would be still in reset and miss the same clock edge, thus potentially ruining your design.

So basically you need to synchronize external asynchronous reset like this:

module rst_resync
(
    input  wire clk,
    input  wire ext_rst_n,
    output wire rst_n
);

    reg [1:0] rst_resync;

    always @(posedge clk, negedge ext_rst_n)
    if( !ext_rst_n )
        rst_resync[1:0] <= 2'b00;
    else
        rst_resync[1:0] <= { rst_resync[0], 1'b1 };

    assign rst_n = rst_resync[1];

endmodule

This way, you are still able to reset your design at any time, and even in the absense of clock (as any async reset does), but internal reset will end synchronously to the clock.

来源：https://stackoverflow.com/questions/28381719/what-if-i-used-asynchronous-reset-should-i-have-to-make-as-synchronous-turned-i