pthreads v. SSE weak memory ordering

♀尐吖头ヾ 提交于 2019-12-03 12:28:40

Non-temporal stores need sfence instruction to be ordered properly.

However, the efficient user-level implementation of a simple mutex supposes that it is released by a simple write which does not imply write-buffers flush, in contrast to atomic read-modify-write operations like lock cmpxchg which imply full memory fence.

So you have a situation when the unlock has no effect of store-with-release semantic applied for non-temporal stores. Thus, these SSE stores can be reordered after the unlock and after another thread acquires the mutex.

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