x86-64

How to interpret this address -0x80(%rbp,%rax,4)

你说的曾经没有我的故事 提交于 2019-11-29 11:47:55
I'm currently trying to learn assembly language (and the effects of different compiler options) by analyzing simple C code snippets. Now I stumpled across the following instruction: mov %edx,-0x80(%rbp,%rax,4) What I do not understand is the expression for the target address -0x80(%rbp,%rax,4) . The instruction assigns a value to a local array in a loop. The machine command will copy the content of %edx to the address given by %rbp + 4 * %rax - 0x80 . It seems %rax is holding the index to that array and %rbp - 0x80 is the base address. Take a look here to get a better understanding for the AT

Memory access error sys_rt_sigaction (signal handler)

泄露秘密 提交于 2019-11-29 11:45:04
Following this Interfacing Linux Signals article, i have been trying to use sys_rt_sigaction in amd64 , but always get memory access error when sending the signal. struct sigaction works when using C/C++ function sigaction . What is wrong in sys_rt_sigaction call? C/C++ with ASM code: #include<signal.h> #include<stdio.h> #include<time.h> void handler(int){printf("handler\n");} void restorer(){asm volatile("mov $15,%%rax\nsyscall":::"rax");} struct sigaction act{handler}; timespec ts{10,0}; int main(){ act.sa_flags=0x04000000; act.sa_restorer=&restorer; //* asm volatile("\ mov $13,%%rax\n\ mov

Is there any type checking in C or C++ linkers?

微笑、不失礼 提交于 2019-11-29 11:31:14
Am I right in saying linkers make no function parameter checks. They do not check the number or types of function calls nor do they check the type of global data references. Is this true for all linkers? I'm using Clang targeting Linux on x86-64. Does the linker check that references are in the right segment? Or is an external reference in effect just a void * as far as the linker is concerned? I'm coming from a high level language background C# and Scala, so this may seem obvious to those that have immersed themselves in the low level world. I've written a couple of my functions (system calls

Relative Addressing errors - Mac 10.10

纵然是瞬间 提交于 2019-11-29 11:22:09
I'm trying to learn how to write assembly code and I'm doing it with the help of http://gnu.mirrors.pair.com/savannah/savannah//pgubook/ProgrammingGroundUp-0-8.pdf . It's an excellent resource and I'm trying to write the code as 64bit for my Mac in Macho64 format. I've run into some trouble with absolute and relative addressing. This is my code: DEFAULT REL ;PURPOSE: This program finds the maximum number of a set of data items ; ;VARIABLES: The registers have the following uses ; ; rbx - Holds the index of the data item being examined ; rdi - Largest data item found ; rax - Current data item ;

Why can't I move directly a byte to a 64 bit register?

。_饼干妹妹 提交于 2019-11-29 11:21:15
Why can't I directly move a byte from memory to a 64-bit register in Intel x86-64 assembly? For instance, this code: extern printf global main segment .text main: enter 2, 0 mov byte [rbp - 1], 'A' mov byte [rbp - 2], 'B' mov r12, [rbp - 1] mov r13, [rbp - 2] xor rax, rax mov rdi, Format mov rsi, r12 mov rdx, r13 call printf leave ret segment .data Format: db "%d %d", 10, 0 prints: 65 16706 I need to change the move byte to registers r12 and r13 to this in order to make the code work properly: xor rax, rax mov al, byte [rbp - 1] mov r12, rax xor rax, rax mov al, byte [rbp - 2] mov r13, rax Now

Is it possible to use both 64 bit and 32 bit instructions in the same executable in 64 bit Linux?

a 夏天 提交于 2019-11-29 11:19:06
A 64 bit CPU (amd64) supports 32 bit Intel instructions in the compatibility mode. Also, a 64 bit Linux installation allows running ELFs containing 32 bit instructions if the ELF header says it is a 32 bit executable. I was wondering if it is possible to put some assembly instructions inside the ELF which switches the CPU to 32 bit compatibility mode in the middle of a program (and then later back again)? If these assembly instructions are not permitted by the kernel, is there perhaps some way we can get the kernel to switch an already running process to 32 bit? This is mainly a question out

Working inline assembly in C for bit parity?

妖精的绣舞 提交于 2019-11-29 11:12:22
I'm trying to compute the bit parity of a large number of uint64's. By bit parity I mean a function that accepts a uint64 and outputs 0 if the number of set bits is even, and 1 otherwise. Currently I'm using the following function (by @Troyseph, found here ): uint parity64(uint64 n){ n ^= n >> 1; n ^= n >> 2; n = (n & 0x1111111111111111) * 0x1111111111111111; return (n >> 60) & 1; } The same SO page has the following assembly routine (by @papadp): .code ; bool CheckParity(size_t Result) CheckParity PROC mov rax, 0 add rcx, 0 jnp jmp_over mov rax, 1 jmp_over: ret CheckParity ENDP END which

How can gcc/clang assume a string constant's address is 32-bit?

▼魔方 西西 提交于 2019-11-29 10:57:20
If I compile this program: #include <stdio.h> int main(int argc, char** argv) { printf("hello world!\n"); return 0; } for x86-64, the asm output uses movl $.LC0, %edi / call puts . ( See full asm output / compile options on godbolt .) My question is: How can GCC know that the the string's address can fit in a 32bit immediate operand? Why doesn't it need to use movabs $.LC0, %rdi (i.e. a mov r64, imm64 , not a zero or sign-extended imm32 ). AFAIK, there's nothing saying the loader has to decide to load the data section at any particular address. If the string is stored at some address above

Detail about MSR_GS_BASE in linux x86 64

情到浓时终转凉″ 提交于 2019-11-29 10:50:26
I tried to figure out the details of MACRO current in Linux kernel. The final assembly code of current is: movq %%gs:0xb000,%0 The code above can work! But when I print the %%gs, its value is 0, so the %%gs points to the first item of GDT NULL!!?? How it works? mov %%gs, %0 Instead, the base of gs is in MSR_GS_BASE, and the current can be replaced like: /*0xb000 is the offset of per_cpu__current_task*/ cur_task = (unsigned long*)(x86_rdmsr64(MSR_GS_BASE) + 0xb000); println("cur_task:%p",*cur_task); My questions is: %gs points to the first item of GDT NULL!!?? How it works as read from MSR_GS

Opposite of cache prefetch hint

筅森魡賤 提交于 2019-11-29 10:42:41
Is there a hint I can put in my code indicating that a line should be removed from cache? As opposed to a prefetch hint, which would indicate I will soon need a line. In my case, I know when I won't need a line for a while, so I want to be able to get rid of it to free up space for lines I do need. Margaret Bloom clflush , clflushopt Invalidates from every level of the cache hierarchy in the cache coherence domain the cache line that contains the linear address specified with the memory operand. If that cache line contains modified data at any level of the cache hierarchy, that data is written