state-machine

问题 We have a system at my work that is basically a message-driven state machine. It takes in a variety of types of messages, looks up some context/state based on the message, then decides what to do, based on the message and the current state. Normally the result is a message being sent out of the system. Are there any good open-source frameworks for implementing a state machine in .NET? I've looked into the latest release of Windows Workflow, and it seems like it would be a good option; however

问题 I'm in the process of implementing a finite state machine in verilog, and I've encountered an issue. However, I know what the problem is, but I'm not sure how to fix it. This is my current code: module moore_SM(clk, rstn, btn, z, rstLED, state); //Port Assignments input clk, rstn; input [2:0] btn; output z; output reg rstLED; output reg [5:0] state; //Internal Port Assignments reg [1:0] w, x; //NOTE: This is typically the input in FSM, //but it is internal because there is a conversion from

问题 would you have a hint at algorithm to convert any regular expression to a finite state machine. For instance, an algorithm parsing a regexp and adding states to the fsm appropriately? Any reference or deeper idea? I am writting this with Python Thanks and regards 回答1: Use Michael Sipser's Introduction to the Theory of Computation. Chapter 1 gives detailed algorithms for converting a regular expression to a deterministic or non-deterministic finite-state automaton (DFA or NFA), in the context

问题 Could all Code ever written be improved by applying the State Machine Pattern? I was working on a project that was a mass of horrendous awful, buggy, broken spaghetti code. I copied Martin Fowler's example State Machine code from this blog and transformed the whole heap of crap into a series of statements. Literally just a list of States, Events, Transitions and Commands. I can't believe the transformation. The code is now clean, and works. Of course i was aware of State Machines before and

问题 What is the difference between Mealy & Moore type of finite state machines? 回答1: In a Moore machine the output produced is associated to the current state of the machine and on it only. In a Mealy machine, instead, it is associated to both a state and a specific input. From a practical point of view you have that output is placed on states in a Moore machine (so every state has its ouput), while on the latter you have outputs on transitions (so an ouput is decided from the current state AND

问题 In the Stack Overflow podcast #36 (http://blog.stackoverflow.com/2009/01/podcast-36/), this opinion was expressed: Once you understand how easy it is to set up a state machine, you’ll never try to use a regular expression inappropriately ever again. I've done a bunch of searching. I've found some academic papers and other complicated examples, but I'd like to find a simple example that would help me understand this process. I use a lot of regular expressions, and I'd like to make sure I never

问题 Closed. This question is off-topic. It is not currently accepting answers. Want to improve this question? Update the question so it's on-topic for Stack Overflow. Closed 3 years ago . I am just wondering if anyone know of some good tutorials on the Internet for developing state machines. Or ebooks? I am starting working on state machines and just need something general to get me started. 回答1: State machines are very simple in C if you use function pointers. Basically you need 2 arrays - one

问题 I am trying to understand how the iterators work internally, to mitigate some concerns I have about thread-safety. Lets consider for example the following simple iterator: using System.Collections.Generic; public class MyClass { public static IEnumerable<int> MyMethod() { yield return 10; yield return 20; yield return 30; } } I can see the compiler-generated state machine that is created behind the scenes, after copy-pasting this code to SharpLab.io. It is a class that implements the

问题 I have implemented a complex state machine with numerous state transitions for a safety SIL 4 system. The back bone for this implementation was done using function pointers. When all was sailing smoothly, the V&V opposed the use of function pointers in a SIL 4 system. Reference- Rule 9 NASA.Misra C 2004 however doesnt say that function pointers cant be used. Is there any other way to implement complex state machines without any function pointers? 回答1: First of all, that NASA document is not

问题 I have seen the following used to make state changes in Verilog modules: state <= 2'b10; state <= #1 IDLE; Why is <= used and not just =? What is the purpose of using #1? Does it make a difference? Here is some Verilog code for a FSM that shows the first one being used. Would it work the same if it was replaced with the second? module fsm( clk, rst, inp, outp); input clk, rst, inp; output outp; reg [1:0] state; reg outp; always @( posedge clk, posedge rst ) begin if( rst ) state <= 2'b00;