processor

问题 Lets say there are two processors on a machine. Thread A is running on P1 and Thread B is running on P2. Thread A calls Sleep(10000); Is it possible that when Thread A starts executing again, it runs on P2? If yes, who decides this transition? If no, why not? Does Processor store some data that which all threads it's running or OS binds each thread to Processor for its full lifetime ? 回答1: It is possible. This would be determined by the operating system process scheduler and may also be

问题 According to AMD manual segmentation can not be disabled. My question is why, why it's impossible? Another question, it says that 64-bit disables it, what does that mean? Is segmentation completly disabled on 64-bit mode? AMD Manual: https://s7.postimg.cc/hk15o6swr/Capture.png 回答1: Introduction In 64-bit mode, whenever a non-null segment selector is loaded into any of the segment registers, the processor automatically loads the corresponding segment descriptor in the hidden part of the

问题 How can I get processor speed of an Android device in MHz? I'm able to get the speed in terms of BogoMips by reading \proc\cpuinfo file. How can I convert BogoMips to MHz or is there any other way to get the speed in MHz? 回答1: You have the maximum processor speed (in Hz) into the file: /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq For instance, the content of that file in my Samsung Galaxy Ace is : 832000 回答2: The wikipedia page on BogoMips (http://en.wikipedia.org/wiki/BogoMips)

问题 I want to write my application logs in another file than the one Symfony2 writes its own logs and system logs. I understood that I needed to create a service of my own like this : services: actionslogger: class: Symfony\Bridge\Monolog\Logger arguments: [app] calls: - [pushHandler, [@actionslogger_handler]] actionslogger_handler: class: Monolog\Handler\StreamHandler arguments: [%kernel.logs_dir%/actions_%kernel.environment%.log, 200] That works fine when I use $logger = $this->get(

问题 I am reading about the architecture of intel's 8086 and can't figure out the following things about segmentation: I know that segment registers point to segments respectively and contain the base address of a 64kb long segment. But who calculates and in which point sets the physical address in the segment registers? Also, because one physical address can be accessed by multiple segment:offset pairs and segments can overlap, how you can be sure that you won't overwrite something? Where I can

问题 Are there any such processors which have instructions to bypass the cache for a specific data? This question also has an answer which suggests that SSE4.2 instructions do bypass the cache. Can somebody enlighten me on that? 回答1: In general, the caching policy is controlled by the Memory Management Unit (MMU). For each address range, a caching policy is decided upon. These tables are managed by the OS and are available in system space. As a sidebar answer to a question that you may have

问题 I saw haswell's microarchitecture from below link mentioned that some pipelines can carry on fast LEA and some can run slow LEA, what's the meaning of fast LEA and slow LEA here? Related to LEA instruction? The search results are usually biases to LEA instruction, and don't lead to direct answer. http://www.realworldtech.com/haswell-cpu/4/ 回答1: Most dedicated ALU units exist only on part of the execution ports (with constant changes being made from generation to generation), the CPU has to

问题 How do I find the processor on which my thread is running in C#? 回答1: This is not necessarily a constant - the thread could be scheduled onto different cores across its lifetime. You can set affinity masks to tie a particular thread to a particular CPU if you want to. See the API docs for Thread.BeginThreadAffinity for more details on what can be done within .Net. 回答2: IMHO it's possible that the .NET thread is not bound to any of the native threads. >NET runtime can move the .NET threads

问题 I was reading about instruction set in wiki and I came across this paragraph: Some virtual machines that support bytecode as their ISA such as Smalltalk, the Java virtual machine, and Microsoft's Common Language Runtime, implement this by translatin the bytecode for commonly used code paths into native machine code. In addition, these virtual machines execute less frequently used code paths by interpretation (see: Just-in-time compilation). Transmeta implemented the x86 instruction set atop

问题 I'm learning to code on Xilinx (VHDL). Next, I want to make a simple microprocessor/microcontroller and on the way learn a little about slice components. So my goal is try to code an 8 bits microprocessor using an AMD 2901 (4 bits-slice). (I already have the code of the 2901 and all its information about its input and output signals.) I know the first step would be make the architecture of the microprocessor so I ended up with something like this (I understand that the bandwidth of the bus