objdump

What is the difference between ldd and objdump?

两盒软妹~` 提交于 2019-11-30 05:01:24
I am running these two commands, and I'm getting different output: $ ldd `which ls` linux-gate.so.1 => (0x00db3000) libselinux.so.1 => /lib/i386-linux-gnu/libselinux.so.1 (0x00ba2000) librt.so.1 => /lib/i386-linux-gnu/librt.so.1 (0x007bf000) libacl.so.1 => /lib/i386-linux-gnu/libacl.so.1 (0x004ce000) libc.so.6 => /lib/i386-linux-gnu/libc.so.6 (0x00110000) libdl.so.2 => /lib/i386-linux-gnu/libdl.so.2 (0x00398000) /lib/ld-linux.so.2 (0x00dea000) libpthread.so.0 => /lib/i386-linux-gnu/libpthread.so.0 (0x00a83000) libattr.so.1 => /lib/i386-linux-gnu/libattr.so.1 (0x00d3d000) and then objdump -x

How can objdump emit intel syntax

自作多情 提交于 2019-11-29 21:14:11
How can I tell objdump to emit assembly in Intel Syntax rather than the default AT&T syntax? Daniel Kamil Kozar What you're looking for is -M intel . Use it as follows. objdump -M intel -d program_name If you want Intel mnemonic codes as well (instead of AT&T mnemonic codes), you can use: objdump -M intel intel-mnemonic -D <program's-object-file> 来源: https://stackoverflow.com/questions/10362630/how-can-objdump-emit-intel-syntax

Can I give objdump an address and have it disassemble the containing function?

非 Y 不嫁゛ 提交于 2019-11-29 12:00:59
问题 I'm finding it really annoying to have to disassemble large swathes of library code just to get enough context to see what is causing a crash. Is there any way that I can just hand objdump an address, and have it find the boundaries of the containing function for me? EDIT: Better yet, can I have it disassemble an entire stack trace for me? 回答1: Something like this perhaps? $ objdump -S --start-address=0x42 foo.o | awk '{print $0} $3~/retq?/{exit}' It prints the dis-assembly listing starting

How to compile library with source code with NDK tools?

a 夏天 提交于 2019-11-29 09:43:09
问题 How to compile library with source code ? I am developing the native library with android ndk. Sometimes I got the crash dump messages from logcat. 06-18 15:24:58.545: INFO/DEBUG(24667): *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** 06-18 15:24:58.545: INFO/DEBUG(24667): Build fingerprint: 'nvidia/harmony/harmony/harmony:2.2/FRF91/20110304.134348:eng/test-keys' 06-18 15:24:58.545: INFO/DEBUG(24667): pid: 25870, tid: 26261 >>> com.andtv <<< 06-18 15:24:58.545: INFO/DEBUG

Post process `objdump --disassemble` with ARM cycle counts

百般思念 提交于 2019-11-29 08:45:18
Is there a script available for post processing some objdump --disassemble output to annotate with cycle counts? Especially for the ARM family. Most of the time this would only be a pattern match with a table lookup for the count. I guess annotations like +5M for five memory cycles might be needed. Perl, python, bash, C , etc are fine. I think this can be done generically, but I am interested in the ARM , which has an orthogonal instruction set. Here is a thread on the 68HC11 doing the same thing. The script would need an CPU model option to select the appropriate cycle counts; I think these

Why does objdump not show .bss, .shstratab, .symtab and .strtab sections?

时光总嘲笑我的痴心妄想 提交于 2019-11-29 01:42:28
I'm currently doing my own objdump implementation in C. For my -s option, I have to show the full contents of the section of an ELF file. I'm doing it well, but i'm showing more sections than the "real" objdump. In fact, it does not output the .bss, .shstrtab, .symtab and .strtab sections. I'm looking around the sh_flags value on the Shdr struct but I can't find any logic... Why objdump -s does not shows these sections ? Why objdump -s does not shows these sections ? Objdump is based on libbfd , which abstracts away many complexities of ELF, and was written when objects tended to only have

What is the difference between ldd and objdump?

Deadly 提交于 2019-11-29 00:57:20
问题 I am running these two commands, and I'm getting different output: $ ldd `which ls` linux-gate.so.1 => (0x00db3000) libselinux.so.1 => /lib/i386-linux-gnu/libselinux.so.1 (0x00ba2000) librt.so.1 => /lib/i386-linux-gnu/librt.so.1 (0x007bf000) libacl.so.1 => /lib/i386-linux-gnu/libacl.so.1 (0x004ce000) libc.so.6 => /lib/i386-linux-gnu/libc.so.6 (0x00110000) libdl.so.2 => /lib/i386-linux-gnu/libdl.so.2 (0x00398000) /lib/ld-linux.so.2 (0x00dea000) libpthread.so.0 => /lib/i386-linux-gnu/libpthread

Buffer Overflow Attack

橙三吉。 提交于 2019-11-28 19:25:03
I'm trying to execute a very simple buffer overflow attack. I'm pretty much a newbie to this. So, if this question is stupid, please excuse me :-) The code: #include<stdio.h> #include<stdlib.h> int i, n; void confused(int i) { printf("**Who called me? Why am I here?? *** %x\n ", i); } void shell_call(char *c) { printf(" ***Now calling \"%s\" shell command *** \n", c); system(c); } void victim_func() { int a[4]; printf("Enter n: "); scanf("%d",&n); printf("~~~~~~~~~~~~~ values and address of n locations ~~~~~~~~~~"); for (i = 0;i <n ;i++) printf ("\n a[%d] = %x, address = %x", i, a[i], &a[i]);

What is register %eiz?

廉价感情. 提交于 2019-11-28 05:12:29
In the following assembly code that I dumped out using objdump : lea 0x0(%esi,%eiz,1),%esi What is register %eiz ? What does the preceding code mean? See Why Does GCC LEA EIZ? : Apparently %eiz is a pseudo-register that just evaluates to zero at all times (like r0 on MIPS). ... I eventually found a mailing list post by binutils guru Ian Lance Taylor that reveals the answer. Sometimes GCC inserts NOP instructions into the code stream to ensure proper alignment and stuff like that. The NOP instruction takes one byte, so you would think that you could just add as many as needed. But according to

Post process `objdump --disassemble` with ARM cycle counts

旧巷老猫 提交于 2019-11-28 01:54:22
问题 Is there a script available for post processing some objdump --disassemble output to annotate with cycle counts? Especially for the ARM family. Most of the time this would only be a pattern match with a table lookup for the count. I guess annotations like +5M for five memory cycles might be needed. Perl, python, bash, C , etc are fine. I think this can be done generically, but I am interested in the ARM , which has an orthogonal instruction set. Here is a thread on the 68HC11 doing the same