VHDL Bit Vector Operators
问题 I'm having a lot of trouble getting some simple math done in VHDL. I'm terrible at this language so if my syntax is stupid or something, I have an excuse :P. I'm trying to implement a very simple random number generator that calculates a pseudo-random number by this formula: seed = (seed*1103515245) + 12345 How I'm trying to do it: Signalss here signal seed: std_logic_vector(31 downto 0) := x"2B4C96B9"; signal multiply: std_logic_vector(31 downto 0) := x"41C64E6D"; signal add: std_logic