mips

Why isn't MIPS BLT instruction implemented in hardware?

ぃ、小莉子 提交于 2020-01-05 09:22:27
问题 I'd like to ask why the BLT instruction is not a part of MIPS ISA. Instead they actually make it a pseudo-instruction for assembly programmers. I just couldn't recognize the difference between BLT and BLTZ (which is a part of MIPS ISA) from hardware implementation point of view. By the way the book "Computer Organization and Design" says : Heeding von Neumann's warning about the simplicity of the "equipment" the MIPS architecture doesn't include branch on less than because it's too

Why isn't MIPS BLT instruction implemented in hardware?

…衆ロ難τιáo~ 提交于 2020-01-05 09:21:24
问题 I'd like to ask why the BLT instruction is not a part of MIPS ISA. Instead they actually make it a pseudo-instruction for assembly programmers. I just couldn't recognize the difference between BLT and BLTZ (which is a part of MIPS ISA) from hardware implementation point of view. By the way the book "Computer Organization and Design" says : Heeding von Neumann's warning about the simplicity of the "equipment" the MIPS architecture doesn't include branch on less than because it's too

MIPS: Comparing user input string to an array of strings in memory

会有一股神秘感。 提交于 2020-01-05 08:35:37
问题 I am new to assembly language, and I have a project that I am struggling with. I don't want code; I just want to make sure I am thinking about the problem correctly so I don't drive myself crazy implementing a bad or down-right incorrect approach. The problem can be summarized as such: We have an array of strings in memory as such: .data animals: .asciiz "bear", "tiger", "gorilla", "horse", "dog" We want to take a user's input string and store it into str: .data animals: .asciiz "bear",

Meanings of mips flags from readelf command?

只谈情不闲聊 提交于 2020-01-05 06:59:19
问题 I have executed the command "readelf -h test" ("test" is my binary program) on linux, and got following text: ELF header: Magic: 7f 45 4c 46 .... Data: 2's complement, little endian ... **Flags: 0x1007, noreorder, pic, cpic, o32, mips1** ... Could you please let me know each meanings of flags of the above text in detail? I have googled it, but could not find answers. Any comments would be appreciated. 回答1: ELF header flags are architecture-specific. For MIPS they are defined in SYSTEM V

MIPS being byte addressable

廉价感情. 提交于 2020-01-05 05:58:12
问题 I have been watching a lecture at the following URL explaining MIPS ISA. http://www.youtube.com/watch?v=DVFwXvxyC38&list=PLD8AF625E53B0691F&index=4 According to my understanding so far: for MIPs 32-bit, the main memory has a 32-bit address input bus, each slot in memory holds 8-bit, so each address can refer to 8-bits of memory (which is why its byte addressable); since register size is 32-bit, "words" in main memory start at every 4th byte (so that each word is 4 consecutive slots in memory

What number registers are the floating point registers in MIPS?

爱⌒轻易说出口 提交于 2020-01-05 02:42:06
问题 I am trying to write out MIPS binary code for machine instructions which have to do with floating-point registers. But while I can find the opcode for the floating-point instructions, I can't find out what numbers refer to which floating-point registers. My book and the Internet can tell me which number register I would use if I wanted to refer to $t1, but I can't find any information on how I would refer to $f1. 回答1: There are 32 floating point registers: $f0 .. $f31 . But every floating

Prompting for user input in assembly ci20 seg fault

被刻印的时光 ゝ 提交于 2020-01-04 06:20:08
问题 I am currently working on a small program on a ci20 machine that prompt the user for a integer value then print the value to the screen. My current code .data prompt: .asciiz "Please enter an integer: " message: .asciiz "\nValue entered: " .text .global main main: addiu $sp, $sp, -4 # push stack sw $ra, ($sp) # save return address addi $v0, $0, 4 la $a0, prompt syscall # printing prompt addi $v0, $0, 5 syscall # get user input move $t0, $v0 # save input in $t0 move $a0, $v0 addi $v0, $0, 1 #

Can the MIPS register $0 be used to store and retrieve values?

白昼怎懂夜的黑 提交于 2020-01-04 02:36:04
问题 When I learned about the MIPS processor, it was pounded into my head that reads of the $0 register always return 0, and writes to $0 are always discarded. From the MIPS Programmer's manual: 2.13.4.1 CPU General-Purpose Registers [...] r0 is hard-wired to a value of zero, and can be used as the target register for any instruction whose result is to be discarded. r0 can also be used as a source when a zero value is needed. From this follows that the instructions or $0,$r31,$0 is a no-op.

Multiplication using Logical shifts in MIPS assembly

早过忘川 提交于 2020-01-02 18:03:38
问题 Can someone please give me pointers on how I can go about making a code that multiplies using shifts in MIPS assembly? I don't understand how having a number 2^n can help me multiply using an odd multiplicand I currently have this code, I'm trying to make a calculator .text li $v0, 4 la $a0, ask_1 syscall li $v0,5 syscall move $s1, $v0 li $v0, 4 la $a0, ask_2 syscall li $v0,5 syscall move $s2, $v0 #sll $s2, $s2, 3 #$s2 * $s2^3 = result srl $s2, $s2, 1 li $v0, 1 la $a0, ($s2) syscall .data ask

Polling I/O (MIPS)

≯℡__Kan透↙ 提交于 2020-01-02 17:15:07
问题 I am attempting to write a program in MIPS that uses polling to read a character from the keyboard and then displays it using the builtin Keyboard and Display MMIO Simulator. Unfortunately, I am having trouble grasping the concept behind the registers used and the control bits, but have been trying to figure it out from examples online. Here is what I have written so far: .data .text .globl main main: .eqv RCR 0xffff0000 # Receiver Control Register (Ready Bit) .eqv RDR 0xffff0004 # Receiver