With Hyper Threading, threads of one physical core are exchanging via what level of cache L1/L2/L3?
Does the Hyper Threading allow to use of L1-cache to exchange the data between the two threads, which are executed simultaneously on a single physical core, but in two virtual cores? With the proviso that both belong to the same process, i.e. in the same address space. Page 85 (2-55) - Intel® 64 and IA-32 Architectures Optimization Reference Manual : http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-optimization-manual.pdf 2.5.9 Hyper-Threading Technology Support in Intel® Microarchitecture Code Name Nehalem ... Deeper buffering and enhanced resource