fma

For XMM/YMM FP operation on Intel Haswell, can FMA be used in place of ADD?

大憨熊 提交于 2019-12-23 11:52:47
问题 This question is for packed, single-prec floating ops with XMM/YMM registers on Haswell. So according to the awesome , awesome table put together by Agner Fog, I know that MUL can be done on either port p0 and p1 (with recp thruput of 0.5), while only ADD is done on only port p1 (with recp thruput of 1). I can except this limitation, BUT I also know that FMA can be done on either port p0 or p1 (with recp thruput of 0.5). So it is confusing to my as to why a plain ADD would be limited to only

Converting from floating-point to decimal with floating-point computations

不羁岁月 提交于 2019-12-22 12:07:28
问题 I am trying to convert a floating-point double-precision value x to decimal with 12 (correctly rounded) significant digits. I am assuming that x is between 10^110 and 10^111 such that its decimal representation will be of the form x.xxxxxxxxxxxE110 . And, just for fun, I am trying to use floating-point arithmetic only. I arrived to the pseudo-code below, where all operations are double-precision operations, The notation 1e98 is for the double nearest to the mathematical 10^98, and 1e98_2 is

Can C# make use of fused multiply-add?

假如想象 提交于 2019-12-22 06:55:44
问题 Does the C# compiler / jitter make use of fused multiply-add operations if they are available on the hardware being used? If it does, are there any particular compiler settings I need to set in order to take advantage of it? My intent is to use compensated algorithms for extended precision arithmetic, and some of them can be written to use FMA. 回答1: At last, .NET Core 3.0 provides System.Math.FusedMultiplyAdd. The rationale for not using this operation automatically is explained in a github

Do FMA (fused multiply-add) instructions always produce the same result as a mul then add instruction?

a 夏天 提交于 2019-12-21 09:17:51
问题 I have this assembly (AT&T syntax): mulsd %xmm0, %xmm1 addsd %xmm1, %xmm2 I want to replace it with: vfmadd231sd %xmm0, %xmm1, %xmm2 Will this transformation always leave equivalent state in all involved registers and flags? Or will the result floats differ slightly in someway? (If they differ, why is that?) (About the FMA instructions: http://en.wikipedia.org/wiki/FMA_instruction_set) 回答1: No. In fact, a major part of the benefit of fused multiply-add is that it does not (necessarily)

Obtaining peak bandwidth on Haswell in the L1 cache: only getting 62%

好久不见. 提交于 2019-12-17 02:58:57
问题 I'm attempting to obtain full bandwidth in the L1 cache for the following function on Intel processors float triad(float *x, float *y, float *z, const int n) { float k = 3.14159f; for(int i=0; i<n; i++) { z[i] = x[i] + k*y[i]; } } This is the triad function from STREAM. I get about 95% of the peak with SandyBridge/IvyBridge processors with this function (using assembly with NASM). However, using Haswell I only achieve 62% of the peak unless I unroll the loop. If I unroll 16 times I get 92%. I

Why does the FMA _mm256_fmadd_pd() intrinsic have 3 asm mnemonics, “vfmadd132pd”, “231” and “213”?

醉酒当歌 提交于 2019-12-14 03:40:04
问题 Could someone explain to me why there are 3 variants of the fused multiply-accumulate instruction: vfmadd132pd , vfmadd231pd and vfmadd213pd , while there is only one C intrinsics _mm256_fmadd_pd ? To make things simple, what is the difference between (in AT&T syntax) vfmadd132pd %ymm0, %ymm1, %ymm2 vfmadd231pd %ymm0, %ymm1, %ymm2 vfmadd213pd %ymm0, %ymm1, %ymm2 I did not get any idea from Intel's intrinsics guide. I ask because I see all of them in the assembler output of a chunk of C code I

How to chain multiple fma operations together for performance?

蹲街弑〆低调 提交于 2019-12-13 12:27:44
问题 Assuming that in some C or C++ code I have a function named T fma( T a, T b, T c ) that performs 1 multiplication and 1 addition like so ( a * b ) + c ; how I'm supposed to optimize multiple mul & add steps ? For example my algorithm needs to be implemented with 3 or 4 fma operations chained and summed together, How I can write this is an efficient way and at what part of the syntax or semantics I should dedicate particular attention ? I also would like some hints on the critical part: avoid

Why does AVX512-IFMA support only 52-bit ints?

只谈情不闲聊 提交于 2019-12-10 15:17:39
问题 From the value we can infer that it uses the same components as double-precision floating-point hardware. But double has 53 bits of mantissa, so why is AVX512-IFMA limited to 52 bits? 回答1: IEEE-754 double precision actually only has 52 explicitly stored bits, the 53rd bit (the most significant bit) is an implicit 1. 来源: https://stackoverflow.com/questions/28862012/why-does-avx512-ifma-support-only-52-bit-ints

Is floating point expression contraction allowed in C++?

老子叫甜甜 提交于 2019-12-07 03:46:31
问题 Floating point expressions can sometimes be contracted on the processing hardware, e.g. using fused multiply-and-add as a single hardware operation. Apparently, using these this isn't merely an implementation detail but governed by programming language specification. Specifically, the C89 standard does not allow such contractions, while in C99 they are allowed provided that some macro is defined. See details in this SO answer. But what about C++? Are floating-point contractions not allowed?

Converting from floating-point to decimal with floating-point computations

核能气质少年 提交于 2019-12-06 10:28:33
I am trying to convert a floating-point double-precision value x to decimal with 12 (correctly rounded) significant digits. I am assuming that x is between 10^110 and 10^111 such that its decimal representation will be of the form x.xxxxxxxxxxxE110 . And, just for fun, I am trying to use floating-point arithmetic only. I arrived to the pseudo-code below, where all operations are double-precision operations, The notation 1e98 is for the double nearest to the mathematical 10^98, and 1e98_2 is the double nearest to the result of the mathematical subtraction 10^98- 1e98 . The notation fmadd(X * Y