cpuid

I need to check ECX for bit 30, which is a CPU feature necessary for RDRAND . From the RDRAND Wiki , If supported, bit 30 of the ECX register is set after calling CPUID standard function 01H. I don't exactly know what this means. "Standard function 01H "? Does this mean EAX=80000001h ? I'm not really sure how to proceed. I think it means that %eax should be 1 when invoking the cpuid function. Hardware guys have strange conventions, so they say 01H instead of 1 or 0x1. See the intel manual Vol 2. Ch 3. Table 3.8. Initial value of eax is 01H. ECX on return is full of feature information in table

I have a Intel Core i5-2450m (2 physical processors and 4 logical processors) and I want to find a way to count logical and physical cores on AMD and Intel CPUs. But, after some searches I noticed something strange. Instead of returning 4 logical units, my code give me 16. static int8_t LogicalProcCount(void) { if ( !Hyperthreading ) return 1; uint32_t unused, ebx; CPUID(1, unused, ebx, unused, unused); return (int8_t) ( (ebx >> 16 ) & 0xFF ); } CPUID.1:EBX[23:16] represents the maximum number of addressable IDs (initial APIC ID) that can be assigned to logical processors in a physical package

I'm trying to gather system information and noticed the following on an Intel Xeon E5420: After executing CPUID(EAX=1) , EDX[28] is set, indicating Hyper-threading support, despite the fact that the processor is listed on the Intel website as not supporting Hyper-threading ( ark.intel.com ) Does anyone have an explanation for this? Here's the definition of that bit according to the Intel Developer's Manual: Max APIC IDs reserved field is Valid. A value of 0 for HTT indicates there is only a single logical processor in the package and software should assume only a single APIC ID is reserved. A

I encountered a problem during preparing an assembler x86 project which subject is to write a program getting L1 data, L1 code, L2 and L3 cache size. I tried to find something in Intel Documentation & in the Internet but I failed. THE MAIN PROBLEM IS: In case of AMD processors it is just to set EAX register to 80000005h & 80000006h values and get desired data from ECX and EDX registers but in case of Intel I can obtain this information only for L2. What should I do to get L1 & L3 cache size for Intel processors ? Marat Dukhan basically gave you the right answer. For newer Intel processors,

Considering that I'm coding in C++, if possible, I would like to use an Intrinsics-like solution to read useful informations about the hardware, my concerns/considerations are: I don't know assembly that well, it will be a considerable investment just to get this kind of informations ( altough it looks like CPU it's just about flipping values and reading registers. ) there at least 2 popular syntax for asm ( Intel and AT&T ), so it's fragmented strangely enough Intrinsics are more popular and supported than asm code this days not all the the compilers that are in my radar right now support

Related to my other question , please help me debug "An unhandled exception of type 'System.AccessViolationException' occurred in Unknown Module. Additional information: Attempted to read or write protected memory. This is often an indication that other memory is corrupt." Stepping through the code, everything works up until the actual call to del() and fails in that line. This code is based on this article's sample and this python code which works in python. I can't get the code example as-is to work either (same exception), but I'm hopeful that it's just a little outdated or something. EDIT:

Is the following code valid to check if a CPU supports the SSE3 instruction set? Using the IsProcessorFeaturePresent() function apparently does not work on Windows XP (see http://msdn.microsoft.com/en-us/library/ms724482(v=vs.85).aspx ). bool CheckSSE3() { int CPUInfo[4] = {-1}; //-- Get number of valid info ids __cpuid(CPUInfo, 0); int nIds = CPUInfo[0]; //-- Get info for id "1" if (nIds >= 1) { __cpuid(CPUInfo, 1); bool bSSE3NewInstructions = (CPUInfo[2] & 0x1) || false; return bSSE3NewInstructions; } return false; } Mysticial I've created a GitHub repro that will detect CPU and OS support