avx512

问题 I am looking for efficient AVX (AVX512) implementation of // Given float u[8]; float v[8]; // Compute float a[8]; float b[8]; // Such that for ( int i = 0; i < 8; ++i ) { a[i] = fabs(u[i]) >= fabs(v[i]) ? u[i] : v[i]; b[i] = fabs(u[i]) < fabs(v[i]) ? u[i] : v[i]; } I.e., I need to select element-wise into a from u and v based on mask , and into b based on !mask , where mask = (fabs(u) >= fabs(v)) element-wise. 回答1: I had this exact same problem just the other day. The solution I came up with

问题 I am looking for efficient AVX (AVX512) implementation of // Given float u[8]; float v[8]; // Compute float a[8]; float b[8]; // Such that for ( int i = 0; i < 8; ++i ) { a[i] = fabs(u[i]) >= fabs(v[i]) ? u[i] : v[i]; b[i] = fabs(u[i]) < fabs(v[i]) ? u[i] : v[i]; } I.e., I need to select element-wise into a from u and v based on mask , and into b based on !mask , where mask = (fabs(u) >= fabs(v)) element-wise. 回答1: I had this exact same problem just the other day. The solution I came up with

问题 Imagine this piece of code: void Function(int16 *src, int *indices, float *dst, int cnt, float mul) { for (int i=0; i<cnt; i++) dst[i] = float(src[indices[i]]) * mul; }; This really asks for gather intrinsics e.g. _mm_i32gather_epi32. I got great success with these when loading floats, but are there any for 16-bit ints? Another problem here is that I need to transition from 16-bits on the input to 32-bits (float) on the output. 回答1: There is indeed no instruction to gather 16bit integers, but

问题 I have many truth-tables of many variables (7 or more) and I use a tool (eg logic friday 1) to simplify the logic formula. I could do that by hand but that is much too error prone. These formula I then translate to compiler intrinsics (eg _mm_xor_epi32) which works fine. Question : with vpternlog I can make ternary logic operations. But I'm not aware of a method to simplify my truth-tables to sequences of vpternlog instructions that are (somewhat) efficient. I'm not asking if someone knows a

来源： https://stackoverflow.com/questions/42763487/best-way-to-store-256-bit-avx-vectors-into-unsigned-long-integers

来源： https://stackoverflow.com/questions/42763487/best-way-to-store-256-bit-avx-vectors-into-unsigned-long-integers

来源： https://stackoverflow.com/questions/57670764/different-inter-core-latency-measured-on-two-identical-skylake-xeon-gold-6154-sy

问题 Closed. This question needs debugging details. It is not currently accepting answers. Want to improve this question? Update the question so it's on-topic for Stack Overflow. Closed 2 years ago . I'm currently working on some optimizations and comparing vectorization possibilities for DSP applications, that seem ideal for AVX512, since these are just simple uncorrelated array processing loops. But on a new i9 I didn't measure any reasonable improvements when using AVX512 compared to AVX2. Any

问题 Writing a ZMM register can leave a Skylake-X (or similar) CPU in a state of reduced max-turbo indefinitely. (SIMD instructions lowering CPU frequency and Dynamically determining where a rogue AVX-512 instruction is executing) Presumably Ice Lake is similar. ( Workaround: not a problem for zmm16..31 , according to @BeeOnRope's comments which I quoted in Is it useful to use VZEROUPPER if your program+libraries contain no SSE instructions? So this strlen could just use vpxord xmm16,xmm16,xmm16

问题 My goal is to create a PCIe transaction with more than 64b payload. For that I need to read an ioremap() address. For 128b and 256b I can use xmm and ymm registers respectively and that works as expected. Now, I'd like to do the same for 512b zmm registers (memory-like storage?!) A code under license I'm not allowed to show here, uses assembly code for 256b: void __iomem *addr; uint8_t datareg[32]; [...] // Read memory address to ymm (to have 256b at once): asm volatile("vmovdqa %0,%%ymm1" :